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SP6655 Datasheet(PDF) 11 Page - Sipex Corporation

Part # SP6655
Description  High Efficiency 400mA Synchronous Buck Regulator
PDF  16 Pages
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Manufacturer  SIPEX [Sipex Corporation]
Direct Link  http://www.sipex.com
Logo SIPEX - Sipex Corporation

SP6655 Datasheet(HTML) 11 Page - Sipex Corporation

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Date: 09/27/05
SP6655 High Efficiency 400mA Synchronous Buck Regulator
© Copyright 2004 Sipex Corporation
For the typical SP6655 application circuit with
inductor size of 10
µH, and KON of 2V*µsec, the
SP6655 current ripple would be about 200mA, and
driver latch and open the switch to prevent
inductor current reversal. This circuit along
with the on-timer puts the converter into PFM
mode and improves light load efficiency when
the load current is less than half the inductor
ripple current defined by KON/L.
Thermal Shutdown
The converter will open both power switches if
the die junction temperature rises above 140
°C.
The die must cool down below 126
°C before the
regulator is re-enabled. This feature protects the
SP6655 and surrounding circuitry from exces-
sive power dissipation due to fault conditions.
Shutdown/Enable Control
The D0, D1 pins 4,5 of the device are logic level
control pins that according to Table 1 shut down
the converter when both are a logic low, or
enables the converter when either are a logic
high. When the converter is shut down, the
power switches are opened and all circuit bias-
ing is extinguished leaving only junction leak-
age currents on supply pins 1 and 2. After pins
4 or 5 are brought high to enable the converter,
there is a turn on delay to allow the regulator
circuitry to re-establish itself. Power conversion
begins with the assertion of the internal refer-
ence ready signal which occurs approximately
150
µs after the enable signal is received.
Battery Low Indicator
The BLON function is a differential measure-
ment of (VIN -VOUT) which causes the open
drain NMOS on pin 3 to sink current to ground
when (VIN -VOUT) < 300mV. Tying a resistor
from pin 3 to VIN or VOUT creates a logic level
battery low indicator. A low bandwidth com-
parator and 3% hysteresis filter the input voltage
ripple to prevent noisy transitions at the thresh
old. BLON is forced Low when in UVLO.
External Feedback Pin
The FB pin 6 is compared to an internal refer-
ence voltage of 0.8V to regulate the SP6655
output. The output voltage can be externally
programmed within the range +1.0V to +5.0V
by tying a resistor from FB to ground and FB to
VOUT (pin7). See the applications section for
resistor selection information.
Inductor Selection
The SP6655 uses a specially adapted minimum
on-time control of regulation utilizing a preci-
sion comparator and bandgap reference. This
adaptive minimum on-time control has the ad-
vantage of setting a constant current ripple for a
given inductor size. From the operations section
it has been shown:
Inductor Current Ripple, ILR ≈
KON
L
THEORY OF OPERATION
APPLICATION INFORMATION
would be fairly constant for different input and
output voltages, simplifying the selection of com-
ponents for the SP6655 power circuit. Other
inductor values could be selected, as shown in
Table 2 Components Selection. Using a larger
value than 10
µH in an attempt to reduce output
voltageripplewouldreduceinductorcurrentripple
and may not produce as stable an output ripple.
For larger inductors with the SP6655, which has
a peak inductor current of 0.625A, most 15
µH
or 22
µH inductors would have to be larger
physical sizes, limiting their use in small por-
table applications. Smaller values like 10
µH
would more easily meet the 0.625A limit and
come in small case sizes, and the increased



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