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LTC1871

1871fe

APPLICATIONS INFORMATION

SEPIC Converter: Output Capacitor Selection

Because of the improved performance of today’s electro-

lytic, tantalum and ceramic capacitors, engineers need

to consider the contributions of ESR (equivalent series

resistance), ESL (equivalent series inductance) and the

bulk capacitance when choosing the correct component

for a given output ripple voltage. The effects of these three

parameters (ESR, ESL, and bulk C) on the output voltage

ripple waveform are illustrated in Figure 17 for a typical

coupled-inductor SEPIC converter.

The choice of component(s) begins with the maximum

acceptable ripple voltage (expressed as a percentage of

the output voltage), and how this ripple should be divided

between the ESR step and the charging/discharging ΔV.

For the purpose of simplicity we will choose 2% for the

maximum output ripple, to be divided equally between the

ESR step and the charging/discharging ΔV. This percentage

ripple will change, depending on the requirements of the

application, and the equations provided below can easily

be modiﬁed.

For a 1% contribution to the total ripple voltage, the ESR

of the output capacitor can be determined using the fol-

lowing equation:

ESRCOUT

0.01• VO

ID(PEAK)

where:

ID(PEAK) = 1+

•IO(MAX) •

VO + VD

VIN(MIN)

+ 1

For the bulk C component, which also contributes 1% to

the total ripple:

COUT

IO(MAX)

0.01• VO • f

For many designs it is possible to choose a single capacitor

type that satisﬁes both the ESR and bulk C requirements

for the design. In certain demanding applications, however,

the ripple voltage can be improved signiﬁcantly by con-

necting two or more types of capacitors in parallel. For

example, using a low ESR ceramic capacitor can minimize

the ESR step, while an electrolytic or tantalum capacitor

can be used to supply the required bulk C.

Once the output capacitor ESR and bulk capacitance have

been determined, the overall ripple voltage waveform

should be veriﬁed on a dedicated PC board (see Board

Layout section for more information on component place-

ment). Lab breadboards generally suffer from excessive

series inductance (due to inter-component wiring), and

these parasitics can make the switching waveforms look

signiﬁcantly worse than they would be on a properly

designed PC board.

Figure 17. SEPIC Converter Switching Waveforms

17a. Input Inductor Current

IIN

IL1

OFF

17b. Output Inductor Current

IL2

17c. DC Coupling Capacitor Current

IIN

IC1

17e. Output Ripple Voltage

VOUT

(AC)

ΔVESR

RINGING DUE TO

TOTAL INDUCTANCE

(BOARD + CAP)

ΔVCOUT

17d. Diode Current

ID1

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