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PIC24FJ64GA Datasheet(PDF) 38 Page - Microchip Technology |
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PIC24FJ64GA Datasheet(HTML) 38 Page - Microchip Technology |
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38 / 52 page  PIC24FJXXXGA0XX DS39768D-page 38 © 2008 Microchip Technology Inc. 5.2.8 PROGC COMMAND The PROGC command instructs the programming executive to program a single Device ID register located at the specified memory address. After the specified data word has been programmed to code memory, the programming executive verifies the programmed data against the data in the command. Expected Response (2 words): 1400h 0002h 5.2.9 PROGP COMMAND The PROGP command instructs the programming executive to program one row of code memory, includ- ing Configuration Words (64 instruction words), to the specified memory address. Programming begins with the row address specified in the command. The destination address should be a multiple of 80h. The data to program to memory, located in command words, D_1 through D_96, must be arranged using the packed instruction word format shown in Figure 5-5. After all data has been programmed to code memory, the programming executive verifies the programmed data against the data in the command. Expected Response (2 words): 1500h 0002h 15 12 11 8 7 0 Opcode Length Reserved Addr_MSB Addr_LS Data Field Description Opcode 4h Length 4h Reserved 0h Addr_MSB MSB of 24-bit destination address Addr_LS Least Significant 16 bits of 24-bit destination address Data 8-bit data word 15 12 11 8 7 0 Opcode Length Reserved Addr_MSB Addr_LS D_1 D_2 ... D_96 Field Description Opcode 5h Length 63h Reserved 0h Addr_MSB MSB of 24-bit destination address Addr_LS Least Significant 16 bits of 24-bit destination address D_1 16-bit data word 1 D_2 16-bit data word 2 ... 16-bit data word 3 through 95 D_96 16-bit data word 96 Note: Refer to Table 2-3 for code memory size information. |
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