SCS750F datasheet(3/5 Pages) MAXWELL

3 / 5 page

SCS750

mICroeLeCtroNICS

page 3 of 5

System Controller

Memory Controller,

PCI, Timers, Interrupts,

DMA, UART,

Reed-Solomon EDAC

SDRAM

256 MBytes

EEPROM

8 MBytes

USRT (x2)

Programmable Timers (x3)

32 Programmable I/O

MIL-STD 1553

BC/RT/MT

(optional)

PowerPC

PMC

TMR Protected

Rad-Tolerant FPGA

SEU Immune

Rad-Tolerant FPGA

SEU Immune

Rad-Tolerant FPGA

SEU Immune

Reed-Solomon

& ECC

Engineering development

use only

Local PCI Bus

32 bit, 33 MHz

SEU Immune

SCS750

Triple Redundant Processing

| Doc. # 1004741 | Rev.

Triple Redundant Processing

• Detects upset

• flushes µprocessors memory into main memory

• tri-states upset µprocessor

• Scrubs memory contents

• restores memory back into µprocessors

• resynchronizes all three µprocessors into lockstep

tmr processor Seu flush

tmr processor restore

flushes and restores in ms!

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