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AS3932 Datasheet(PDF) 17 Page - ams AG |
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AS3932 Datasheet(HTML) 17 Page - ams AG |
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17 / 34 page ![]() www.ams.com/LF-Receiver/AS3932 Revision 1.7 17 - 34 AS3932 Datasheet - Detailed Descr i p ti on The last 8 bits are the data that has to be written respectively read. A CS toggle high-low-high terminates the command mode. If a direct command is sent (B15-B14=11) the bits from B13 to B8 defines the direct command while the last 8 bits are omitted. The Table 12 shows all possible direct commands: All direct commands are explained below: - clear_wake: clears the wake state of the chip. In case the chip has woken up (WAKE pin is high) the chip is set back to listening mode - reset_RSSI: resets the RSSI measurement. - trim_osc: starts the trimming procedure of the internal RC oscillator (see Figure 21) - clear_false: resets the false wake-up register (R13<7:0>=00) - preset_default: sets all register in the default mode, as shown in Figure 7 Writing of Data to Addressable Registers (WRITE Mode). The SDI is sampled at the falling edge of SCLK (as shown in the following diagrams). A CS toggling high-low-high indicates the end of the WRITE command after register has been written. The following example shows a write command. Figure 13. Writing of a Single Byte (falling edge sampling) 00 101 0 R10 00 101 1 R11 00 110 0 R12 00 110 1 R13 Table 12. List of Direct Commands COMMAND_MODE B13 B12 B11 B10 B9 B8 clear_wake 0 0 0 0 0 0 reset_RSSI 0 0 0 0 0 1 trim_osc 0 0 0 0 1 0 clear_false 0 00 01 1 preset_default 0 0 0 1 0 0 Table 11. SDI Command Structure B13 B12 B11 B10 B9 B8 Read/Write register CS SCLK SDI 0 0 A5 A4 A3 A2 A1 A0 D5 D4 D3 D2 D1 D0 D7 D6 X X SCLK rising edge Data is transfered from µC SCLK falling edge Data is sampled Data is moved to Address A5-A0 CS falling edge signals end of WRITE Mode Two leading Zeros indicate WRITE Mode |
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