5-1

FAST AND LS TTL DATA

SERIAL-IN PARALLEL-OUT

SHIFT REGISTER

The SN54 / 74LS164 is a high speed 8-Bit Serial-In Parallel-Out Shift Regis-

ter. Serial data is entered through a 2-Input AND gate synchronous with the

LOW to HIGH transition of the clock. The device features an asynchronous

Master Reset which clears the register setting all outputs LOW independent of

the clock. It utilizes the Schottky diode clamped process to achieve high

speeds and is fully compatible with all Motorola TTL products.

CONNECTION DIAGRAM DIP (TOP VIEW)

14

13

12

11

10

9

1

2

3

4

5

6

8

7

VCC

Q7

Q6

Q5

Q4

MR

CP

A

B

Q0

Q1

Q2

Q3

GND

NOTE:

The Flatpak version

has the same pinouts

(Connection Diagram) as

the Dual In-Line Package.

PIN NAMES

LOADING (Note a)

HIGH

LOW

A, B

CP

MR

Q0 – Q7

Data Inputs

Clock (Active HIGH Going Edge) Input

Master Reset (Active LOW) Input

Outputs (Note b)

0.5 U.L.

0.5 U.L.

0.5 U.L.

10 U.L.

0.25 U.L.

0.25 U.L.

0.25 U.L.

5 (2.5) U.L.

NOTES:

a) 1 TTL Unit Load (U.L.) = 40

µA HIGH/1.6 mA LOW.

b) The Output LOW drive factor is 2.5 U.L. for Military (54) and 5 U.L. for Commercial (74)

Temperature Ranges.

SN54/74LS164

SERIAL-IN PARALLEL-OUT

SHIFT REGISTER

LOW POWER SCHOTTKY

J SUFFIX

CERAMIC

CASE 632-08

N SUFFIX

PLASTIC

CASE 646-06

14

1

14

1

ORDERING INFORMATION

SN54LSXXXJ

Ceramic

SN74LSXXXN

Plastic

SN74LSXXXD

SOIC

14

1

D SUFFIX

SOIC

CASE 751A-02

LOGIC SYMBOL

1

2

8

9

3

4

5

6 10 11 12 13

A

B

CP

LS164

8-BIT SHIFT REGISTER

MR Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7

VCC = PIN 14

GND = PIN 7