THS4281DBVT datasheet(22/37 Pages) NSC

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Dmax +

Tmax–TA

where:

PDmax is the maximum power dissipation in the amplifier (W).

Tmax is the absolute maximum junction temperature (°C).

TA is the ambient temperature (°C).

θJA = θJC + θCA

θJC is the thermal coefficient from the silicon junctions to the

case (

°C/W).

θCA is the thermal coefficient from the case to ambient air

(

°C/W).

0.2

0.4

0.6

0.8

1.2

1.4

1.6

1.8

−40

−20

100

8-pin SOIC (D) Package

8-pin MSOP

(DGK) Package

5-pin SOT23

(DBV) Package

TA − Free-Air Temperature − °C

θJA = 97.5°C/W for 8-Pin SOIC (D)

θJA = 180.8°C/W for 8-Pin MSOP (DGK)

θJA = 255.4°C/W for 5-Pin SOT−23 (DBV)

TJ = 125°C, No Airflow

THS4281

SLOS432A – APRIL 2004 – REVISED NOVEMBER 2009

www.ti.com

4. Connections to other wideband devices on

THERMAL ANALYSIS

the board should be made with short direct

The THS4281 does not incorporate automatic thermal

traces or through onboard transmission lines.

shutoff protection, so the designer must take care to

For short connections, consider the trace and the

ensure that the design does not violate the absolute

input to the next device as a lumped capacitive

maximum junction temperature of the device. Failure

load. Relatively wide traces (50 mils to 100 mils)

may

result

the

absolute

maximum

junction

should be used, preferably with ground and

temperature of +150° C is exceeded. For long-term

power planes opened up around them. Low

dependability, the junction temperature should not

parasitic capacitive loads (< 4 pF) may not need

exceed +125°C.

an R(ISO), because the THS4281 is nominally

compensated to operate at unity gain (+1 V/V)

The thermal characteristics of the device are dictated

with a 2-pF capacitive load. Higher capacitive

by the package and the PCB. Maximum power

loads without an R(ISO) are allowed as the signal

dissipation for a given package can be calculated

gain increases. If a long trace is required, and the

using the following formula.

6-dB signal loss intrinsic to a doubly terminated

transmission line is acceptable, implement a

matched

impedance

transmission

line

using

microstrip or stripline techniques (consult an ECL

design handbook for microstrip and stripline

layout techniques). A matching series resistor into

the trace from the output of the THS4281 is used

as well as a terminating shunt resistor at the input

of the destination device. Remember also that the

terminating impedance is the parallel combination

of the shunt resistor and the input impedance of

the

destination

device:

this

total

effective

impedance should be set to match the trace

impedance.

the

6-dB

attenuation

doubly-terminated

transmission

line

unacceptable,

long

trace

can

series-terminated at the source end only. Treat

the trace as a capacitive load in this case, and

use a series resistor (R(ISO) = 10 Ω to 100 Ω, as

noted above) to isolate the capacitive load. If the

input impedance of the destination device is low,

there is signal attenuation due to the voltage

divider formed by R(ISO) into the terminating

impedance. A 50-

Ω environment is normally not

necessary

onboard,

and

fact

higher

impedance environment improves distortion as

shown in the distortion versus load plots.

5. Socketing a high-speed part like the THS4281

is not recommended. The additional lead length

and pin-to-pin capacitance introduced by the

Figure 76. Maximum Power Dissipation vs

socket

can

create

troublesome

parasitic

Ambient Temperature

network which can make it almost impossible to

achieve a smooth, stable frequency response.

When determining whether or not the device satisfies

Best results are obtained by soldering the

the maximum power dissipation requirement, it is

THS4281 onto the board.

important to consider not only quiescent power

space

dissipation, but also dynamic power dissipation. Often

maximum power dissipation is difficult to quantify

space

because the signal pattern is inconsistent, but an

estimate of the RMS value can provide a reasonable

analysis.

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