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ICS953002 Datasheet(PDF) 25 Page - Integrated Circuit Systems

Part # ICS953002
Description  Programmable Timing Control Hub for Next Gen P4 processor
PDF  35 Pages
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Manufacturer  ICST [Integrated Circuit Systems]
Direct Link  http://www.icst.com
Logo ICST - Integrated Circuit Systems

ICS953002 Datasheet(HTML) 25 Page - Integrated Circuit Systems

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25
Integrated
Circuit
Systems, Inc.
ICS953002
0924—11/18/09
I
2C Table: PLL1 Frequency Control Register
Bit 7
N Div7
RW
X
Bit 6
N Div6
RW
X
Bit 5
N Div5
RW
X
Bit 4
N Div4
RW
X
Bit 3
N Div3
RW
X
Bit 2
N Div2
RW
X
Bit 1
N Div1
RW
X
Bit 0
N Div0
RW
X
I
2C Table: PLL1 Spread Spectrum Control Register
Bit 7
SSP7
RW
X
Bit 6
SSP6
RW
X
Bit 5
SSP5
RW
X
Bit 4
SSP4
RW
X
Bit 3
SSP3
RW
X
Bit 2
SSP2
RW
X
Bit 1
SSP1
RW
X
Bit 0
SSP0
RW
X
I
2C Table: PLL1 Spread Spectrum Control Register
Bit 7
Reserved
Reserved
R
0
Bit 6
SSP14
RW
X
Bit 5
SSP13
RW
X
Bit 4
SSP12
RW
X
Bit 3
SSP11
RW
X
Bit 2
SSP10
RW
X
Bit 1
SSP9
RW
X
Bit 0
SSP8
RW
X
I
2C Table: Output Divider Control Register
Bit 7
CPUDiv3
RW
0000:/2
0100:/4
1000:/8
1100:/16
X
Bit 6
CPUDiv2
RW
0001:/3
0101:/6
1001:/12
1101:/24
X
Bit 5
CPUDiv1
RW
0010:/5
0110:/10 1010:/20
1110:/40
X
Bit 4
CPUDiv0
RW
0011:/7
0111:/14 1011:/28
1111:/56
X
Bit 3
AGP/PCIDiv3
RW
0000:/2
0100:/4
1000:/8
1100:/16
X
Bit 2
AGP/PCIDiv2
RW
0001:/3
0101:/6
1001:/12
1101:/24
X
Bit 1
AGP/PCIDiv1
RW
0010:/5
0110:/10 1010:/20
1110:/40
X
Bit 0
AGP/PCIDiv0
RW
0011:/7
0111:/14 1011:/28
1111:/56
X
AGP/PCI Divider Ratio
Programmaing Bits
PLL2
PWD
PWD
Byte 12
Pin #
Name
-
-
Name
Type
Type
-
N Divider Programming
b(7:0)
-
-
-
-
-
Control Function
-
-
-
-
Byte 13
Pin #
-
-
PWD
-
Byte 14
Pin #
Name
Type
Control Function
--
0
-
-
-
-
-
-
-
-
-
Spread Spectrum
Programming b(14:8)
Spread Spectrum
Programming b(7:0)
Control Function
0
1
01
These Spread Spectrum bits in Byte 13
and 14 will program the spread pecentage
of PLL1
The decimal representation of M and N
Divier in Byte 11 and 12 will configure the
PLL1 VCO frequency. Default at power
up = latch-in or Byte 0 Rom table.
VCO Frequency = 14.318 x [NDiv(9:0)+8]
/ [MDiv(5:0)+2]
PWD
Byte 15
Pin #
Name
Control Function
0
1
-
-
-
-
-
-
-
-
These Spread Spectrum bits in Byte 13
and 14 will program the spread pecentage
of PLL1
1
CPU Divider Ratio
Programmaing Bits
Type



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