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LTC6946

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PIN FUNCTIONS

VRF+ (Pin 13): 3.15V to 3.45V Positive Supply Pin for

RF Circuitry. This pin should be bypassed directly to the

ground plane using a 0.01μF ceramic capacitor as close

to the pin as possible.

BB (Pin 14): RF Reference Bypass. This output must be

bypassed with a 1.0μF ceramic capacitor to GND. Do not

couple this pin to any other signal.

TUNE (Pin 15): VCO Tuning Input. This frequency control

pin is normally connected to the external loop filter. See

the Applications Information section for more details.

TB (Pin 16): VCO Bypass. This output must be bypassed

with a 2.2μF ceramic capacitor to GND, and is normally

connected to CMA, CMB and CMC with a short trace. Do

not couple this pin to any other signal.

CMC, CMB, CMA (Pins 18, 19, 20): VCO Bias Inputs. These

inputs are normally connected to TB with a short trace

and bypassed with a 2.2μF ceramic capacitor to GND. Do

not couple these pins to any other signal. For best phase

noise performance, do not place a trace between these

pads underneath the package.

VVCO+ (Pin 22): 4.75V to 5.25V Positive Supply Pin for

VCO Circuitry. This pin should be bypassed directly to the

ground plane using both 0.01μF and 1μF ceramic capaci-

tors as close to the pin as possible.

GND (23): Negative Power Supply (Ground). This pin is

attached directly to the die attach paddle (DAP) and should

be tied directly to the ground plane.

VCP+ (Pin 24): 4.0V to 5.25V Positive Supply Pin for Charge

Pump Circuitry. This pin should be bypassed directly to

the ground plane using a 0.1μF ceramic capacitor as close

to the pin as possible.

CP (Pin 25): Charge Pump Output. This bi-directional

current output is normally connected to the external loop

filter. See the Applications Information section for more

details.

VREF+ (Pin 26): 3.15V to 3.45V Positive Supply Pin for

Reference Input Circuitry. This pin should be bypassed

directly to the ground plane using a 0.1μF ceramic capaci-

tor as close to the pin as possible.

REF+, REF– (Pins 27, 28):

Reference Input Signals. This

differential input is buffered with a low noise amplifier,

which feeds the reference divider and reference buffer.

They are self-biased and must be AC-coupled with 470pF

capacitors. If used single ended, bypass REF– to GND with

a 470pF capacitor.

GND (Exposed Pad Pin 29): Negative Power Supply

(Ground). The package exposed pad must be soldered

directly to the PCB land. The PCB land pattern should have

multiple thermal vias to the ground plane for both low

ground inductance and also low thermal resistance.

LTC6946 Datasheet(PDF) 11 Page - Linear Technology

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