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AT25DF011 Datasheet(PDF) 1 Page - List of Unclassifed Manufacturers |
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AT25DF011 Datasheet(HTML) 1 Page - List of Unclassifed Manufacturers |
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1 / 39 page ![]() DS-25DF011–032A–4/2014 Features Single 1.65V - 3.6V Supply Serial Peripheral Interface (SPI) Compatible Supports SPI Modes 0 and 3 Supports Dual Output Read 85MHz Maximum Operating Frequency Clock-to-Output (t V) of 6 ns Flexible, Optimized Erase Architecture for Code + Data Storage Applications Uniform 256-Byte Page erase Uniform 4-Kbyte Block Erase Uniform 32-Kbyte Block Erase Full Chip Erase Hardware Controlled Locking of Protected Sectors via WP Pin 128-Byte Programmable OTP Security Register Flexible Programming Byte/Page Program (1 to 256 Bytes) Fast Program and Erase Times 1.5ms Typical Page Program (256 Bytes) Time 50ms Typical 4-Kbyte Block Erase Time 400ms Typical 32-Kbyte Block Erase Time Automatic Checking and Reporting of Erase/Program Failures Software Controlled Reset JEDEC Standard Manufacturer and Device ID Read Methodology Low Power Dissipation 200nA Ultra Deep Power Down current (Typical) 5µA Deep Power-Down Current (Typical) 25uA Standby current (Typical) 5mA Active Read Current (Typical) Endurance: 100,000 Program/Erase Cycles Data Retention: 20 Years Temperature Range:-10°C to +85°C (1.65V to 3.6V), -40°C to +85° (1.7V to 3.6V) Industry Standard Green (Pb/Halide-free/RoHS Compliant) Package Options 8-lead SOIC (150-mil) 8-pad Ultra Thin DFN (2 x 3 x 0.6 mm) 8-lead TSSOP Package AT25DF011 1-Mbit, 1.65V Minimum SPI Serial Flash Memory with Dual-I/O Support PRELIMINARY DATASHEET |
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