IO196NPB3 datasheet(205/210 Pages) MICROSEMI

205 / 210 page

ProASIC3 Flash Family FPGAs

Re vi s i on 15

5 - 9

Advance v0.6

(continued)

The "RESET" section was updated.

2-25

The "WCLK and RCLK" section was updated.

2-25

The "RESET" section was updated.

2-25

The "RESET" section was updated.

2-27

The "Introduction" of the "Advanced I/Os" section was updated.

2-28

The "I/O Banks" section is new. This section explains the following types of I/Os:

Advanced

Standard+

Standard

Table 2-12 • Automotive ProASIC3 Bank Types Definition and Differences is

new. This table describes the standards listed above.

2-29

PCI-X 3.3 V was added to the Compatible Standards for 3.3 V in Table 2-

11 • VCCI Voltages and Compatible Standards

2-29

Table 2-13 • ProASIC3 I/O Features was updated.

2-30

The "Double Data Rate (DDR) Support" section was updated to include

information concerning implementation of the feature.

2-32

The "Electrostatic Discharge (ESD) Protection" section was updated to include

testing information.

2-35

Level 3 and 4 descriptions were updated in Table 2-43 • I/O Hot-Swap and 5 V

Input Tolerance Capabilities in ProASIC3 Devices.

2-64

The notes in Table 2-43 • I/O Hot-Swap and 5 V Input Tolerance Capabilities in

ProASIC3 Devices were updated.

2-64

The "Simultaneous Switching Outputs (SSOs) and Printed Circuit Board Layout"

section is new.

2-41

A footnote was added to Table 2-14 • Maximum I/O Frequency for Single-Ended

and Differential I/Os in All Banks in Automotive ProASIC3 Devices (maximum

drive strength and high slew selected).

2-30

Table 2-18 • Automotive ProASIC3 I/O Attributes vs. I/O Standard Applications

2-45

Table 2-50 • ProASIC3 Output Drive (OUT_DRIVE) for Standard I/O Bank Type

(A3P030 device)

2-83

Table 2-51 • ProASIC3 Output Drive for Standard+ I/O Bank Type was updated.

2-84

Table 2-54 • ProASIC3 Output Drive for Advanced I/O Bank Type was updated.

2-84

The "x" was updated in the "User I/O Naming Convention" section.

2-48

The "VCC Core Supply Voltage" pin description was updated.

2-50

The "VMVx I/O Supply Voltage (quiet)" pin description was updated to include

information concerning leaving the pin unconnected.

2-50

The "VJTAG JTAG Supply Voltage" pin description was updated.

2-50

The "VPUMP Programming Supply Voltage" pin description was updated to

include information on what happens when the pin is tied to ground.

2-50

The "I/O User Input/Output" pin description was updated to include information on

what happens when the pin is unused.

2-50

The "JTAG Pins" section was updated to include information on what happens

when the pin is unused.

2-51

Revision

Changes

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