L1DMPPA21 datasheet(32/222 Pages) TI1

32 / 222 page

OMAP-L137

SPRS563G – SEPTEMBER 2008 – REVISED JUNE 2014

www.ti.com

3.7.6

Serial Peripheral Interface Modules (SPI0, SPI1)

Table 3-10. Serial Peripheral Interface (SPI) Terminal Functions

SIGNAL NAME

TYPE(1)

PULL(2)

MUXED

DESCRIPTION

ZKB

SPI0

UART0, EQEP0B,

SPI0_SCS[0] /UART0_RTS/EQEP0B/GP5[4]/BOOT[4]

I/O

IPU

SPI0 chip select

GPIO, BOOT

UART0, EQEP0A,

SPI0_ENA /UART0_CTS/EQEP0A/GP5[3]/BOOT[3]

I/O

IPU

SPI0 enable

GPIO, BOOT

SPI0_CLK/EQEP1I/GP5[2]/BOOT[2]

I/O

IPD

eQEP1, GPIO, BOOT

SPI0 clock

SPI0 data slave-in-

SPI0_SIMO[0]/EQEP0S/GP5[1]/BOOT[1]

I/O

IPD

master-out

eQEP0, GPIO, BOOT

SPI0 data slave-out-

SPI0_SOMI[0]/EQEP0I/GP5[0]/BOOT[0]

I/O

IPD

master-in

SPI1

SPI1_SCS[0] /UART2_TXD/GP5[13]

I/O

IPU

SPI1 chip select

UART2, GPIO

SPI1_ENA /UART2_RXD/GP5[12]

I/O

IPU

SPI1 enable

SPI1_CLK/EQEP1S/GP5[7]/BOOT[7]

I/O

IPD

eQEP1, GPIO, BOOT

SPI1 clock

SPI1 data slave-in-

SPI1_SIMO[0]/I2C1_SDA/GP5[6]/BOOT[6]

I/O

IPU

master-out

I2C1, GPIO, BOOT

SPI1 data slave-out-

SPI1_SOMI[0]/I2C1_SCL/GP5[5]/BOOT[5]

I/O

IPU

master-in

(1)

I = Input, O = Output, I/O = Bidirectional, Z = High impedance, PWR = Supply voltage, GND = Ground, A = Analog signal.

Note: The pin type shown refers to the input, output or high-impedance state of the pin function when configured as the the signal name

highlighted in bold. All multiplexed signals may enter a high-impedance state when the configured function is input-only or the configured

function supports high-Z operation. All GPIO signals can be used as input or output. For multiplexed pins where functions have different

types (ie., input versus output), the table reflects the pin function direction for that particular peripheral.

(2)

IPD = Internal Pulldown resistor, IPU = Internal Pullup resistor

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