LP3972 datasheet(17/59 Pages) TI1

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VOUT

TIME (4 Ps/DIV)

200 mA/DIV

VSW

2V/DIV

20 mV/DIV

AC Coupled

VIN = 3.6V

VOUT = 1.5V

IOUT = 20 mA

VOUT

TIME (200 ns/DIV)

200 mA/DIV

VSW

2V/DIV

10 mV/DIV

AC Coupled

VIN = 3.6V

VOUT = 1.5V

IOUT = 400 mA

LP3972

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SNVS468J – SEPTEMBER 2006 – REVISED AUGUST 2011

Figure 15. Typical PWM Operation

Internal Synchronous Rectification

While in PWM mode, the converters uses an internal NFET as a synchronous rectifier to reduce rectifier forward

voltage drop and associated power loss. Synchronous rectification provides a significant improvement in

efficiency whenever the output voltage is relatively low compared to the voltage drop across an ordinary rectifier

diode.

Current Limiting

A current limit feature allows the converters to protect itself and external components during overload conditions.

PWM mode implements current limiting using an internal comparator that trips at 2.0 A (typ). If the output is

shorted to ground the device enters a timed current limit mode where the NFET is turned on for a longer duration

until the inductor current falls below a low threshold, ensuring inductor current has more time to decay, thereby

preventing runaway.

PFM OPERATION

At very light loads, the converter enters PFM mode and operates with reduced switching frequency and supply

current to maintain high efficiency.

The part will automatically transition into PFM mode when either of two conditions occurs for a duration of 32 or

more clock cycles:

1. The inductor current becomes discontinuous.

2. The peak PMOS switch current drops below the IMODE level, (Typically IMODE < 30 mA + VIN/42Ω).

Figure 16. Typical PFM Operation

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