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MB40C950VPFQ Datasheet(PDF) 13 Page - fujitsu semiconductor |
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MB40C950VPFQ Datasheet(HTML) 13 Page - fujitsu semiconductor |
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13 / 17 page  13 MB40C950V (Continued) AVDD RCLK R0 to R9 RCLK R0 to R9 GCLK G0 to G9 GCLK G0 to G9 BCLK B0 to B9 BCLK CE DVSS AVSS VA BIREF Bout BVRIN 0 to 1 V (1 VP−P) +2 V BVB GIREF Gout GVRIN 0 to 1 V (1 VP−P) +2 V GVB RIREF Rout RVRIN 0 to 1 V (1 VP−P) +2 V RVB B0 to B9 0.1 µF +5 V +5 V DVDD 10 10 10 RREF RREF RREF 0.1 µF 0.1 µF 0.1 µF 0.1 µF 0.1 µF 2.4 k Ω 2.4 k Ω 2.4 k Ω 75 Ω 75 Ω RL RL 75 Ω RL • RL = 75 Ω |
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