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MB84VB2000 Datasheet(PDF) 17 Page - fujitsu semiconductor |
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MB84VB2000 Datasheet(HTML) 17 Page - fujitsu semiconductor |
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17 / 28 page  17 MB84VB2000-10/MB84VB2001-10 tCH tWP tWHWH1 tWC tAH CE OE tRC Addresses Data tAS tOE tWPH tGHWL tDH DQ7 PD A0H DOUT WE 555H PA PA tOH Data Polling 3rd Bus Cycle tCS tCE tDS DOUT Notes: 1.PA is address of the memory location to be programmed. 2.PD is data to be programmed at byte address. 3.DQ7 is the output of the complement of the data written to the device. 4.DOUT is the output of the data written to the device. 5.Figure indicates last two bus cycles out of four bus cycle sequence. 6.These waveforms are for the ×16 mode. (The addresses differ from ×8 mode.) Figure 3 Alternate WE Controlled Program Operation Timings WE OE CE Data Polling DQ7 |
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