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MB89133AP Datasheet(PDF) 21 Page - fujitsu semiconductor |
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MB89133AP Datasheet(HTML) 21 Page - fujitsu semiconductor |
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21 / 59 page ![]() MB89130/130A Series 21 s s s s BLOCK DIAGRAM Main clock oscillator Timebase timer External interrupt 2* (wake-up function) CMOS I/O port CMOS output port F2MC-8L RAM MOD0, MOD1, VCC, VSS The other pins X0 X1 RST P00/ (INT20) ROM 8-bit serial I/O Buzzer output N-ch open-drain output port P30/SCK P34/TO/INT0 CPU 8-bit timer/counter CMOS I/O port 8 8 P10 to P17 Reset circuit (WDT) External interrupt 1 8-bit timer/counter P33/EC/SCO P32/SI P31/SO P35/INT1 P36/INT2 P37/BZ/(RCO) P40/AN0 to P43/AN3 Subclock oscillator (32.768 kHz) 8 Remote control* transmitting frequency generator Clock controller 4 X0A X1A 8-bit A/D converter 4 AVR AVCC AVSS to P07/ (INT27) P20 to P27 * : Only for the MB89130A series. Note : Parenthesized pin function is only for the MB89130A series. |
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