MB89151APF datasheet(19/52 Pages) FUJITSU

19 / 52 page

MB89150/150A Series

s BLOCK DIAGRAM

Main clock

oscillator

Clock controller

Subclock oscillator

(32.768 kHz)

21-bit time-base

timer

External interrupt 2

(wake-up function)

CMOS I/O port

F 2MC-8L

CPU

RAM

(Max. 256

× 8bits)

MOD0, MOD1, V CC, V SS

X0A

X1A

RST

P00/INT20

to P07/INT27

ROM

(Max. 16 K

× 8 bits)

8-bit serial I/O

N-ch open-drain I/O port

P21*4,P26*4

P27/BUZ*4

P25/SCK

P24/SO

P23/SI

Reset circuit

(WDT)

8-bit timer/counter

N-ch open-drain output port

(Only P30 is a CMOS output type.)

P22/TO

P20/EC

SEG0 to SEG19

V0 to V3

P54/SEG32*3

to P57/SEG35*3

P44/SEG24*3

to P47/SEG27*3

P40/SEG20*3

to P43/SEG23*3

P32/C0*2

LCD controller/

driver

External interrupt 1

(wake-up function)

P10/INT10

to P13/INT13

Buzzer output

8-bit timer/counter

Remote control

output

Reference voltage

generator and

booster*1

P50/SEG28*3

to P53/SEG31*3

COM0 to COM3

P31/C1*2

P30/RCO

P14 to P17

N-ch open-drain output port

*1: Selected by mask option

*2: Used as ports without a reference voltage generator and booster

*3: Functions selected by mask option

*4: N-ch open-drain high-current drive type

× 4 bits

VRAM

Other pins

MB89151APF Datasheet(PDF) 19 Page - fujitsu semiconductor

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