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HT24LC02 Datasheet(PDF) 6 Page - Holtek Semiconductor Inc |
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HT24LC02 Datasheet(HTML) 6 Page - Holtek Semiconductor Inc |
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6 / 8 page  write cycle, then no ACK will be returned. If the cycle is completed, then the device will return the ACK and the master can then pro- ceed with the next read or write command. • Write protect The HT24LC01/02 can be used as a serial ROM when the WP pin is connected to VCC. Programming will be inhibited and the entire memory will be write-protected. • Read operations Read operations are initiated the same way as write operations with the exception that the read/write select bit in the device address word is set to one. There are three read opera- tions: current address read, random address read and sequential read. • Current address read The internal data word address counter main- tains the last address accessed during the last read or write operation, incremented by one. This address stays valid between operations as long as the chip power is maintained. The address roll over during read from the last byte of the last memory page to the first byte of the first page. The address roll over during write from the last byte of the current page to the first byte of the same page. Once the de- vice address with the read/write select bit set to one is clocked in and acknowledged by the EEPROM, the current address data word is serially clocked out. The microcontroller does not respond with an input zero but generates a following stop condition (refer to Current read timing). • Random read A random read requires a dummy byte write sequence to load in the data word address which is then clocked in and acknowledged by the EEPROM. The microcontroller must then generate another start condition. The micro- controller now initiates a current address read by sending a device address with the read/write select bit high. The EEPROM ac- knowledges the device address and serially clocks out the data word. The microcontroller does not respond with a zero but does gener- ates a following stop condition (refer to Ran- dom read timing). Acknowledge polling flow HT24LC01/02 6 6th May ’99 |
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