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80960JD Datasheet(PDF) 56 Page - Intel Corporation |
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80960JD Datasheet(HTML) 56 Page - Intel Corporation |
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56 / 61 page  52 PRELIMINARY 80960JD Table 19. Natural Boundaries for Load and Store Accesses Data Width Natural Boundary (Bytes) Byte 1 Short Word 2 Word 4 Double Word 8 Triple Word 16 Quad Word 16 Table 20. Summary of Byte Load and Store Accesses Address Offset from Natural Boundary (in Bytes) Accesses on 8-Bit Bus (WIDTH1:0=00) Accesses on 16 Bit Bus (WIDTH1:0=01) Accesses on 32 Bit Bus (WIDTH1:0=10) +0 (aligned) • byte access • byte access • byte access Table 21. Summary of Short Word Load and Store Accesses Address Offset from Natural Boundary (in Bytes) Accesses on 8-Bit Bus (WIDTH1:0=00) Accesses on 16 Bit Bus (WIDTH1:0=01) Accesses on 32 Bit Bus (WIDTH1:0=10) +0 (aligned) • burst of 2 bytes • short-word access • short-word access +1 • 2 byte accesses • 2 byte accesses • 2 byte accesses |
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