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HC5513 Datasheet(PDF) 13 Page - Intersil Corporation |
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HC5513 Datasheet(HTML) 13 Page - Intersil Corporation |
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13 / 18 page ![]() 66 The function of this circuit is to maintain the tip and ring voltages symmetrically around VBAT/2, in the presence of longitudinal currents. The differential transconductance amplifiers GT and GR accomplish this by sourcing or sinking the required current to maintain VC at VBAT/2. When a longitudinal current is injected onto the tip and ring inputs, the voltage at VC moves from it’s equilibrium value VBAT/2. When VC changes by the amount ∆VC, this change appears between the input terminals of the differential transconductance amplifiers GT and GR. The output of GT and GR are the differential currents ∆I1 and ∆I2, which in turn feed the differential inputs of current sources IT and IR respectively. IT and IR have current gains of 250 single ended and 500 differentially, thus leading to a change in IT and IR that is equal to 500(∆I) and 500(∆I2). The circuit shown in Figure 20(B) illustrates the tip side of the longitudinal network. The advantages of a differential input current source are: improved noise since the noise due to current source 2IO is now correlated, power savings due to differential current gain and minimized offset error at the Operational Amplifier inputs via the two 5k Ω resistors. Digital Logic Inputs Table 1 is the logic truth table for the TTL compatible logic input pins. The HC5513 has two enable inputs pins (E0, E1) and two control inputs pins (C1, C2). The enable pin E0 is used to enable or disable the DET output pin. The DET pin is enabled if E0 is at a logic level 0 and disabled if E0 is at a logic level 1. The enable pin E1 gates the ground key detector to the DET output with a logic level 0, and gates the loop or ring trip detector to the DET output with a logic level 1. A combination of the control pins C1 and C2 is used to select 1 of the 4 possible operating states. A description of each operating state and the control logic follow: Open Circuit State (C1 = 0, C2 = 0) In this state the SLIC is effectively off. All detectors and both the tip and ring line drive amplifiers are powered down, presenting a high impedance to the line. Power dissipation is at a minimum. Active State (C1 = 0, C2 = 1) The tip output is capable of sourcing loop current and for open circuit conditions is about -4V from ground. The ring output is capable of sinking loop current and for open circuit conditions is about VBAT + 4V. VF signal transmission is normal. The loop current and ground key detectors are both active, E0 and E1 determine which detector is gated to the DET output. Ringing State (C1 = 1, C2 = 0) The ring relay driver and the ring trip detector are activated. Both the tip and ring line drive amplifiers are powered down. Both tip and ring are disconnected from the line via the external ring relay. Standby State (C1 = 1, C2 = 1) Both the tip and ring line drive amplifiers are powered down. Internal resistors are connected between tip to ground and ring to VBAT to allow loop current detect in an off-hook condition. The loop current and ground key detectors are both active, E0 and E1 determine which detector is gated to the DET output. AC Transmission Circuit Stability To ensure stability of the AC transmission feedback loop two compensation capacitors CTC and CRC are required. Figure 21 (Application Circuit) illustrates their use. Recommended value is 2200pF. FIGURE 20A. FIGURE 20B. FIGURE 20. LONGITUDINAL IMPEDANCE NETWORK TIP RING VBAT/2 GT GR ∆I1 ∆I1 ∆I2 ∆I2 IT IR RLARGE RLARGE ∆VT + - ILONG ILONG HC5513 ILONG ILONG ∆VR + - VC + - VBAT/2 VC RLARGE RLARGE TIP RING 5k Ω 5k Ω 20 Ω + - 2I0 ∆I1 ∆I1 GT TIP CURRENT SOURCE WITH DIFFERENTIAL INPUTS TIP DIFFERENTIAL TRANSCONDUCTANCE AMPLIFIER HC5513 |
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