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HC5526IP Datasheet(PDF) 7 Page - Intersil Corporation

Part # HC5526IP
Description  ITU CO/PABX SLIC with Low Power Standby
PDF  18 Pages
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Manufacturer  INTERSIL [Intersil Corporation]
Direct Link  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

HC5526IP Datasheet(HTML) 7 Page - Intersil Corporation

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63
Circuit Operation and Design Information
The HC5526 is a current feed voltage sense Subscriber Line
Interface Circuit (SLIC). This means that for short loop
applications the SLIC provides a programmed constant
current to the tip and ring terminals while sensing the tip to
ring voltage.
The following discussion separates the SLIC’s operation into
its DC and AC paths, then follows up with additional circuit
and design information.
Constant Loop Current (DC) Path
SLIC in the Active Mode
The DC path establishes a constant loop current that flows
out of tip and into the ring terminal. The loop current is
programmed by resistors RDC1, RDC2 and the voltage on
the RDC pin (Figure 13). The RDC voltage is determined by
the voltage across R1 in the saturation guard circuit. Under
constant current feed conditions, the voltage drop across R1
sets the RDC voltage to -2.5V. This occurs when current
flows through R1 into the current source I2. The RDC voltage
establishes a current (IRSN) that is equal to VRDC/(RDC1
+RDC2). This current is then multiplied by 1000, in the loop
current circuit, to become the tip and ring loop currents.
For the purpose of the following discussion, the saturation
guard voltage is defined as the maximum tip to ring voltage
at which the SLIC can provide a constant current for a given
battery and overhead voltage.
SUPPLY CURRENTS (VBAT = -28V)
ICC, On-Hook
Open Circuit State (C1, 2 = 0, 0)
-
-
1.5
mA
Standby State (C1, 2 = 1, 1)
-
-
1.7
mA
Active State (C1, 2 = 0,1)
-
-
5.5
mA
IEE, On-Hook
Open Circuit State (C1, 2 = 0, 0)
-
-
0.8
mA
Standby State (C1, 2 = 1, 1)
-
-
0.8
mA
Active State (C1, 2 = 0, 1)
-
-
2.2
mA
IBAT, On-Hook
Open Circuit State (C1, 2 = 0, 0)
-
-
0.4
mA
Standby State (C1, 2 = 1, 1)
-
-
0.6
mA
Active State (C1, 2 = 0, 1)
-
-
3.9
mA
PSRR
VCC to 2 or 4-Wire Port
(Note 30, Figure 12)
-
40
-
dB
VEE to 2 or 4-Wire Port
(Note 30, Figure 12)
-
40
-
dB
VBAT to 2 or 4-Wire Port
(Note 30, Figure 12)
-
40
-
dB
FIGURE 12. POWER SUPPLY REJECTION RATIO
Electrical Specifications
TA =0
oCto70oC, V
CC =5V ±5%, VEE = -5V ±5%, VBAT = -28V, AGND = BGND = 0V, RDC1 =RDC2 = 41.2kΩ,
RD = 39kΩ,RSG = ∞,RF1 =RF2 =0Ω,CHP = 10nF, CDC = 1.5µF, ZL = 600Ω, Unless Otherwise Specified. All
pin number references in the figures refer to the 28 lead PLCC package. (Continued)
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
RT
RRX
600k
Ω
300k
Ω
RL
VTX
600
Ω
100mVRMS, 50Hz TO 4kHz
-48V SUPPLY
5V SUPPLY
-5V SUPPLY
PSRR = 20 log (VTX/VIN)
TIP
27
VTX
19
RING
28
RSN
16
HC5526



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