ADE7752B_15 datasheet(16/24 Pages) AD

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ADE7752B

Rev. 0 | Page 16 of 24

POWER SUPPLY MONITOR

The ADE7752B contains an on-chip power supply monitor. The

power supply (VDD) is monitored continuously. At power-up,

when the supply is less than 4 V ± 2% and VREF is less than 1.9 V

(typical), the outputs of the ADE7752B are inactive and the data

path is held in reset. Once VDD is greater than 4 V ± 2% and

VREF is greater than 1.9 V (typical), the chip is active and energy

accumulation begins. At power-down, when VDD falls below 4 V

or VREF falls below 1.9 V (typical), the data path is again held in

reset. This implementation ensures correct device operation at

power-up and at power-down. The power supply monitor has

built-in hysteresis and filtering. This gives a high degree of

immunity to false triggering due to noisy supplies.

The power supply and decoupling for the part should be such

that the ripple at VDD does not exceed ±5% as specified for

normal operation.

VDD

VREF

INTERNAL

RESET

ACTIVE

INACTIVE

2.4V

1.9V

INACTIVE

Figure 19. On-Chip Power Supply Monitor

ADE7752B Datasheet(PDF) 16 Page - Analog Devices