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AN2760 Datasheet(PDF) 10 Page - STMicroelectronics |
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AN2760 Datasheet(HTML) 10 Page - STMicroelectronics |
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10 / 14 page ![]() Cell phone system design with STCD10x0 clock solution AN2760 10/14 Figure 5. Connection of the DC-CUT capacitor and bias 2.4 Connecting STCD10x0 outputs to application modules The output channels of the STCD10x0 are biased at half of VCC internally by design. 1µF DC-CUT capacitors are required at each of the outputs in most applications. 2.5 Power-down sequence If the STCD10x0 shares the same power supply with TCXO (clock source), it is suggested to power up the TCXO before enabling each of the clock outputs since normally it will take several milliseconds for the TCXO to stabilize its output. If the STCD10x0 uses different power supplies with TCXO, it is not recommended to power down VCC of STCD10x0 since it only consumes standby current which is no more than 1µA (when no clock output is enabled, the STCD10x0 enters standby mode). If shutdown of the STCD10x0 is preferred, the following power-down steps must be followed: 1. Shut down clock source TCXO output 2. Disable EN pins, pull low 3. Shut down STCD10x0 power VCC If the power-down sequence is not strictly followed as above, the user may find the clock output waveform viewed at the condition of TCXO active with output, VCC of STCD10x0 shutdown, and EN pins active. This possibility is illustrated in Figure 6. ai13957 STCD1020 STCD1030 STCD1040 VCTCXO MCLK OUT VCC R1 R2 DC-CUT 0.1 μF |
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