AN4015

Design guidelines for PCB schematic and layout

Doc ID 022507 Rev 1

17/22

6.2

Layout

●

Solder 100 nF and 1µF bypass ceramic capacitors as close as possible to the related

IC pin

●

To avoid the effect due to the parasitic inductive coil generated by the copper wires, it is

suggested to use the ceramic capacitor to balance the reactance. It's mandatory to

place the ceramic capacitor as close as possible to the related pins. The distance

between the capacitor to the related pins is recommended to be within 5 mm.

Figure 19.

Decoupling capacitors

●

Solder the snubber networks as close as possible to the related IC pin. A high level

spike may occur if the snubber network is placed too far from the pins. It's

recommended that the distance from the snubber network be within 3 mm which takes

into consideration the width of the copper wire.

Figure 20.

Snubber network

Ground pin and Vcc pin of

100 nF and 1

μF capacitors

should be connected to the

related IC pin directly

Snubber network