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AN1089 Datasheet(PDF) 6 Page - STMicroelectronics |
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AN1089 Datasheet(HTML) 6 Page - STMicroelectronics |
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6 / 12 page ![]() As a tool to ease the design of L6561’s E/A compensation networks in TM boost PFC preregulators, the Appendix contains a Mathcad® file gathering the theory above illustrated and performing all the neces- sary calculations. Conclusions This paper gets an insight into the control loop of TM controlled Boost PFC preregulators based on the L6561 PFC controller. This reveals that the simple feedback capacitor used to compensate the error am- plifier in preregulators for lamp ballast may not be adequate in systems that may experience large vari- ations in input voltage and/or load current. Moreover it leads to an unstable loop if the load is a switching converter. Appropriate compensation schemes are suggested for both cases and a calculation tool (Mathcad® file) is provided so as to make control loop design easier in such systems. References [1] "L6561, Enhanced Transition Mode Power Factor Corrector", (AN966) [2] "L6569 - L6561 Lighting Application with PFC" (AN991) [3] "Electronic Ballast with PFC Using L6574 and L6561" (AN993) [4] "Design Equations of High-Power-Factor Flyback Converters Based on the L6561" (AN1059) [5] "Flyback Converters with the L6561 PFC Controller" (AN1060) Appendix This Mathcad® file allows to design the control loop and performs a stability analysis of PFC preregula- tors in boost topology operated in Transition Mode and controlled by the L6561. Highlighted equations indicate data that must be manually entered. These data are supposted to be known to the user as a result of the design of the PFC preregulator (the use of the PFC design software included in the CD-ROM "Linear and Switching Voltage Regulators" is recommended). The example val- ues are taken from the L6561 demo board circuit. PFC Converter Data: Output Voltage VO := 400 V Output Capacitor CO := 47 µF Sense Resistor Rs := 0.41 Ω Output Overvoltage Threshold OVP := 40 V Expected Efficiency η := 0.9 Multiplier Biasing: Input Divider Upper Resistor Rup := 1240 k Ω Input Divider Lower Resistor Rlow := 10 k Ω Analysis Setpoint: Mains RMS Voltage Virms := 264 V Output Power PO := 80 W AN1089 APPLICATION NOTE 6/12 |
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