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AN1451 Datasheet(PDF) 3 Page - STMicroelectronics

Part # AN1451
Description  L6208 FULLY INTEGRATED TWO PHASE
PDF  43 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

AN1451 Datasheet(HTML) 3 Page - STMicroelectronics

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AN1451 APPLICATION NOTE
2
DESIGNING AN APPLICATION WITH L6208
2.1 Current Ratings
With MOSFET (DMOS) devices, unlike bipolar transistors, current under short circuit conditions is, at first ap-
proximation, limited by the RDS(ON) of the DMOS themselves and could reach very high values. L6208 Out pins
and the two VSA and VSB pins are rated for a maximum of 2.8A r.m.s. and 5.6A peak (typical values), corre-
sponding to a total (for the whole IC) 5.6A rms (11.2A peak). These values are meant to avoid damaging metal
structures, including the metallization on the die and bond wires. In practical applications, though, maximum al-
lowable current is less than these values, due to power dissipation limits (see
Power Management section).
The device has a built-in Over Current Detection (OCD) that provides protection against short circuits between
the outputs and between an output and ground (see
Over Current Protection section).
2.2 Voltage Ratings and Operating Range
The L6208 requires a single supply voltage (VS), for the motor supply. Internal voltage regulators provide the
5V and 10V required for the internal circuitry. The operating range for VS is 8 to 52V. To prevent working into
undesirable low supply voltage an
Under Voltage Lock Out (UVLO) circuit shuts down the device when supply
voltage falls below 6V; to resume normal operating conditions, VS must then exceed 7V. The hysteresis is pro-
vided to avoid false intervention of the UVLO function during fast VS ringings. It should be noted, however, that
DMOS's RDS(ON) is a function of the VS supply voltage. Actually, when VS is less than 10V, RDS(ON) is adversely
affected, and this is particularly true for the High Side DMOS that are driven from VBOOT supply. This supply is
obtained through a charge pump from the internal 10V supply, which will tend to reduce its output voltage when
VS goes below 10V. Figure 2 shows the supply voltage of the high side gate drivers (VBOOT - VS) versus the
supply voltage (VS).
Figure 2. High side gate drivers supply voltage versus supply voltage.
Note that VS must be connected to both VSA and VSB since the bootstrap voltage (at VBOOT pin) is the same for
the two H-bridges. The integrated DMOS have a rated Drain-Source breakdown voltage of 60V. However VS
should be kept below 52V, since in normal working conditions the DMOS see a Vds voltage that will exceed VS
supply. In particular, when using the
fast decay mode, at the beginning of the off-time (when all the DMOS are
off during dead-time) the
SENSE pin sees a negative spike due to a not negligible parasitic inductance of the
PCB path from the pin to GND. This spike is followed by a stable negative voltage due to the drop on RSENSE.
One of the two
OUT pins of the bridge sees a similar behavior, but with a slightly larger voltage due to the for-
ward recovery time of the integrated freewheeling diode and the forward voltage drop across it (see Figure 3).
Typical duration of this spike is 30ns. At the same time, the other
OUT pin of the same bridge sees a voltage
VS [V]
VBOOT - VS
[V]
6
6.4
6.8
7.2
7.6
8
8
8 .5
9
9 .5
10
10.5



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