| Electronic Components Datasheet Search |
|
AN4077 Datasheet(PDF) 26 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
AN4077 Datasheet(HTML) 26 Page - STMicroelectronics |
|
26 / 33 page ![]() Layout hints AN4077 26/33 Doc ID 022997 Rev 1 6 Layout hints The layout of any converter is a very important phase in the design process needing attention by the design engineers. Even though the layout phase may sometimes seem time consuming, a good layout certainly saves time during the functional debugging and the qualification phases. Additionally, a power supply circuit with a correct layout needs smaller EMI filters or less filter stages and so allows a consistent cost saving. Converters using the L6564H do not need any special or specific layout rule to be followed; just the general layout rules for any power converter must be applied carefully. Basic rules are listed here below, they can be used for other PFC circuits having any power level, working either in transition mode or with a fixed-off-time control. 1. Keep power and signal RTN separated. Connect the return pins of the component carrying high current such as input filter, sense resistors, and output capacitor as close as possible. This point is the RTN star point. A downstream converter must be connected to this return point. 2. Minimize the length of the traces relevant to the boost inductor, MOSFET drain, boost rectifier and output capacitor. 3. Keep signal components as close as possible to each L6564H relevant pin. Keep the tracks relevant to the pin #1 (INV) net as short as possible. Components and traces relevant to the error amplifier must be placed far from traces and connections carrying signals with high dV/dt like the MOSFET drain. 4. Please connect heatsinks to power GND. 5. Add an external shield to the boost inductor and connect it to power GND. 6. Connect the RTN of signal components including the feedback, PFC_OK and MULT dividers close to the L6564H pin #12 (GND). 7. Connect a ceramic capacitor (100÷470 nF) to pin #14 (VCC) and to pin #12 (GND), close to the L6564H. Connect this point to the RTN star point (see rule 1). Figure 36. EVL6564H-100W PCB layout (smt side view) |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |