UPD4990AC datasheet(13/20 Pages) NEC

Part #	UPD4990AC

Description	SERIAL I/O CALENDAR & CLOCK CMOS LSI

PDF	20 Pages

Scroll/Zoom	100%

Manufacturer	NEC [NEC]

Direct Link	http://www.nec.com/

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µPD4990A

DATA INPUT/OUTPUT TIMING DIAGRAM

Figure 4.

Note: Reading-in timing of CPU (Trailing edge of CLK).

TIMING DIAGRAM OF DATA INPUT AND OUTPUT

Figure 5.

CLK

DATA

OUT

ENBL

Written-in data LSB ("H")

appears at output.

'86

November 25 (Sat.)

2 hours 23 minutes

49 seconds.

'70

July 16 (Sun.)

2 hours 24 minutes

35 seconds.

"1" year "10" year

"1" s.

"1" min.

"10" s.

"1" year "10" year

"1" s.

"1" min.

"10" s.

INPUT

TIMING

OUTPUT

TIMING

0123456789 1011

4041424344454647

Command (C2, C1, C0) is set to (1, 1, 1).

Command (C3', C2', C0') is set to [0001] (Register Shift Mode).

CS = "H"

VIH

VIL

VIH

CLK

DATA OUT

DATA IN

VIL

VOH

VOL

tdC-O

tDSU

tDHLD

1 s MAX. (RL = 33 k

Ω, CL = 25 pF)

1 s MIN.

tDHLD

tDSU

UPD4990AC Datasheet(PDF) 13 Page - NEC

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