Electronic Components Datasheet Search
  English  ▼
ALLDATASHEET.NET

X  

AN1048D Datasheet(PDF) 6 Page - STMicroelectronics

Part # AN1048D
Description  ST7 software LCD driver
PDF  21 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

AN1048D Datasheet(HTML) 6 Page - STMicroelectronics

Back Button AN1048D Datasheet HTML 2Page - STMicroelectronics AN1048D Datasheet HTML 3Page - STMicroelectronics AN1048D Datasheet HTML 4Page - STMicroelectronics AN1048D Datasheet HTML 5Page - STMicroelectronics AN1048D Datasheet HTML 6Page - STMicroelectronics AN1048D Datasheet HTML 7Page - STMicroelectronics AN1048D Datasheet HTML 8Page - STMicroelectronics AN1048D Datasheet HTML 9Page - STMicroelectronics AN1048D Datasheet HTML 10Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 6 / 21 page
background image
LCD drive signals
AN1048
6/21
2.3
Quadruplex LCD drive
In a quadruplex LCD drive, four backplanes are used. Each LCD pin is connected to four
LCD segments, with each segment connected on the other side to one of the four
backplanes. Thus, only (S/4)+4 MCU pins are necessary to drive an LCD with S segments.
For example: to drive an LCD with 128 segments (32 x4), only 36 I/O ports are required (32
I/O ports to drive the segments, 4 I/O ports to drive the backplanes).
Three different voltage levels have to be generated on the common lines: 0, VDD/2, VDD.
The Segment line voltage levels are 0 and VDD only. The LCD segment is inactive if the
RMS voltage is below the LCD threshold voltage and is active if the LCD RMS voltage is
above the threshold. Figure 6 shows typical Backplane, Segment and LCD waveforms. The
intermediate voltage VDD/2 is only required for Backplane voltages. The MCU I/O pins
selected as “Backplanes” are set by software to output mode for 0 or VDD levels and to the
high impedence input mode for VDD/2. The VDD/2 voltage is defined by two resistors of
equal value, externally connected to the I/O pins. When one backplane or COM is active, the
other ones are neutralized by applying VDD/2 to them.
Figure 5.
Basic LCD Segment Connection in Quadruplexed Mode
COM1
COM2
S1
S11 S12
S2
S3
COM3
COM4
S13
S14



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com