4/17

MIGRATING APPLICATIONS FROM ST72511/311/314/124 TO ST72521/321/324

2 FEATURE OVERVIEW

Table 2. 64-Pin Package Migration

Feature

ST72314N

ST72311R

ST72511R

ST72321R

ST72521R

Package

64-pin (no change)

Program Memory

CFlash/ROM

EPROM/OTP/ROM

HDFlash/ROM

Operating

Supply

3.0V to 5.5V

Register Map

128 bytes

128 bytes (minor changes)

RESET

Transistor based pull-up

Real pull-up resistor

I/Os

44

48 (no change)

Slow Mode

Yes

Yes

(minor programming difference)

Active-HALT

no delay on wake-up

Main Clock Out

Watchdog

Yes

Yes (minor timing change)

16-bit Timer

Yes

Yes (minor change in PWM

and One Pulse modes)

ART-PWM Timer

No

Yes (no change)

SPI

Yes

Yes (control bits moved from

Miscellaneous register to SPI

register)

SCI

Yes

Yes (baudrate increased,

prescaler enhanced)

No

Yes (upward compatible)

ADC

8-bit

10-bit (upward compatible)

CAN

No

Yes

No

Yes (no change)

LVD

3 Levels

(4.5V/4V/3.5V)

1 Level

(4.5V)

3 Levels

(4.5V/4V/3.5V)

CSS

Yes (fixed

frequency)

No

Yes (adapted frequency)

Emulator

ST7MDT2-EMU2B and ST7MTD2-DVP2

ST7MDT20M-EMU3 and

ST7MDT20-DVP2 (planned)

Prog. tools

ST7MDT2-EPB2

ST7MDT20M-EPB