AN2366

ST72F324 migration: feature overview

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1

ST72F324 migration: feature overview

Table 2.

Feature overview

1.

Refer to the corresponding datasheets for more information.

ST72F324

ST72324 ROM

ST72F324B

ST72324B ROM

Package

TQFP32 (7x7) / SDIP32

2.

SDIP42 / SDIP32 packages are valid only for non-automotive devices.

Program memory

8K to 32K

RAM

384 bytes to 1 Kbyte

Operating supply

3.8V to 5.5V

Register map

128 bytes

I/Os

32/24 Multifunction bidirectional lines

22/17 Alternate function lines

12/10 High sink outputs

Power saving modes

Slow / Wait /

Active Halt / Halt

Slow / Wait /

Active Halt / Halt

Slow / Wait /

Active Halt /

3.

Exit from Active Halt mode available with external interrupts.

Slow / Wait /

Active Halt /

Halt(3)

Nested interrupts

Yes

MCC / RTC

Yes

Watchdog

Yes

16-bit timer

(OC / IC / PWM)

4.

The TAOC2HR and TAOC2LR registers are write only; reading them will return undefined values and

OCF2 flag in the TACSR register cannot be used (forced to ‘0’ by hardware).

2 Timers (3/3/2)

2 Timers (3/3/2)

2 Timers (3/3/2)

SPI

Yes

Yes

Yes

Yes

SCI

Yes

Yes

Yes

Yes

ADC

Yes

Yes

5.

Improved ADC accuracy.

Yes(5)

LVD

Yes

No

Yes

6.

For 8K and 16K devices, Readout Protection is not supported if LVD is enabled.

Emulator

ST7MDT20J-EMU3 and ST7MTD20-DVP3 (for Flash devices only)

Programming tools

ST7MDT20J-EPB and ST7MTD20-DVP3 (for Flash devices only)