ADC hardware description

AN2658

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Doc ID 14152 Rev 2

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ADC hardware description

1.1

General properties

STM8 family microcontrollers include one Analog to Digital Converter which has up to 16

multiplexed inputs. Depending on the STM8 device, the ADC can be one of two types:

●

A basic ADC type named ADC2

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An extended ADC type named ADC1

The resolution of both ADC types is 10 bits. The number of external analog inputs depends

on the package size of the chosen STM8 family device.

The ADC is a successive approximation Analog to Digital Converter (SAR). Conversion can

be performed in continuous mode or single mode. The analog input channels can be

selected individually or in scan mode. In scan mode, several channels are converted in

sequence, the channel number is incremented for each conversion. The digital result is then

stored in registers. Because the ADC resolution is 10 bits and the ADC data register bit

length is 16, one ADC result is stored in two 8-bit registers. The 10-bit data is either right or

left aligned (this is selectable) in the 16-bit register. Devices with ADC1 can use buffered

mode for data storage. In this case, the values converted by the ADC are stored in N data

buffers (to decrease CPU overhead).

The event used to start conversion can be generated by software or by the STM8

microcontroller's internal timer 1 (any type of timer event can be used). The start of A/D

conversion can also be triggered by an external pin.

The reference voltage for the ADC depends from package. It comes either from an external

source - in this case the reference must be connected to two external pins - or is connected

internally to analog power supply pins. The value of this reference voltage is restricted in its

reference voltage around the range of values to be measured.

Devices with ADC1 have an analog watchdog function. This function compares the

converted data with high and low thresholds and if a threshold is reached then the analog

watchdog flag is set.

If needed, an interrupt can be generated at the end of conversion and if an analog watchdog

event occurred.

The ADC is driven by a clock derived from the MCU master clock through a programmable

divider. This allows you to select the ADC clock speed according to your application

requirements.