High speed internal oscillator calibration

AN3101

6/24

DocID16612 Rev 6

2

High speed internal oscillator calibration

HSI oscillator frequencies may vary from one chip to another due to manufacturing process

variations. For this reason, each device is factory-calibrated by ST to have a 1% accuracy at

calibration HSICALR register.

The frequency of the HSI RC oscillator can be trimmed to achieve a better accuracy with

wider temperature and supply voltage ranges, the HSITRIMR register is used for this

purpose.

To modify the content of the HSITRMR register the access has to be granted by

successfully unlocking the write protection mechanism which consists of two consecutive

write accesses to the HSIUNLCKR register, the first one with the value 0xAC and the

second one with the value 0x35. This must be immediately followed by a write access to the

HSITRIM register. Once this register is configured, its value is used instead of the HSICALR

register values.

The HSI oscillator frequency increases monotonically with the increasing values in the

HSITRIMR register as long as the trimming value changes in the low nibble (4-bits). Any

change to the HSITRIMR value in the high nibble can cause a non-monotonicity in the graph

of the trimming function resulting in a sawtooth shape, as exemplified in Figure 1.

Figure 1. Example of HSI oscillator trimming characteristics

The maximum HSI frequency variation due to the temperature and/or voltage drift is 16 MHz

+ 3%, that is, 16 MHz + 480 kHz. Please, refer to the datasheet.

8 trimming steps (each of about 64 kHz) are required to compensate for this variation and

the upper trimming threshold is therefore required to be HSICALR + 8.

The minimum HSI frequency variation due to the temperature and/or voltage drift is 16 MHz

- 4.5%, that is 16 MHz - 720 kHz. To be able to compensate for this variation, 12 trimming

steps (each of about 64 kHz) are required to compensate for this variation and the lower

trimming threshold must be HSICALR -12.