ICS853S011CGI REVISION A JULY 16, 2013

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©2013 Integrated Device Technology, Inc.

ICS853S011CI Data Sheet

LOW SKEW, 1-TO-2, DIFFERENTIAL-TO-2.5V, 3.3V LVPECL/ECL FANOUT BUFFER

Power Considerations

This section provides information on power dissipation and junction temperature for the ICS853S011CI.

Equations and example calculations are also provided.

1.

Power Dissipation.

The total power dissipation for the ICS853S011CI is the sum of the core power plus the power dissipation due to loading.

NOTE: Please refer to Section 3 for details on calculating power dissipation due to loading.

•

•

If all outputs are loaded, the total power is 2 * 31.22mW = 62.44mW

2. Junction Temperature.

Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad, and directly affects the reliability of the device. The

maximum recommended junction temperature is 125°C. Limiting the internal transistor junction temperature, Tj, to 125°C ensures that the bond

wire and bond pad temperature remains below 125°C.

The equation for Tj is as follows: Tj =



Tj = Junction Temperature



Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)

In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance



a multi-layer board, the appropriate value is 145.4°C/W per Table 5A below.

Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:

85°C + 0.154W * 145.4°C/W = 107.4°C. This is below the limit of 125°C.

This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow and the type of

board (multi-layer).



Meters per Second

01

2.5

Multi-Layer PCB, JEDEC Standard Test Boards

145.4°C/W

141.3°C/W

139.3°C/W



Meters per Second

01

2.5

Multi-Layer PCB, JEDEC Standard Test Boards

102.0°C/W

95.0°C/W

90.6°C/W