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MAX503CAG Datasheet(PDF) 14 Page - Maxim Integrated Products |
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MAX503CAG Datasheet(HTML) 14 Page - Maxim Integrated Products |
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14 / 16 page ![]() 5V, Low-Power, Parallel-Input, Voltage-Output, 10-Bit DAC 14 ______________________________________________________________________________________ INPUT* OUTPUT 1111 1111 11(00) 1000 0000 01(00) 1000 0000 00(00) 0111 1111 11(00) 0000 0000 01(00) 0000 0000 00(00) (VREFIN) 1023 1024 (VREFIN) 513 1024 (VREFIN) 512 1024 (VREFIN) 511 1024 (VREFIN) 1 1024 OV = +VREFIN/2 Table 3. Unipolar Binary Code Table (0V to VREFIN Output), Gain = 1 INPUT* OUTPUT 1111 1111 11(00) 1000 0000 01(00) 1000 0000 00(00) 0111 1111 11(00) 0000 0000 01(00) 0000 0000 00(00) +2 (VREFIN) 1023 1024 +2 (VREFIN) 513 1024 +2 (VREFIN) 512 1024 +2 (VREFIN) 511 1024 +2 (VREFIN) 1 1024 OV = +VREFIN Table 4. Unipolar Binary Code Table (0V to 2VREFIN Output), Gain = 2 INPUT* OUTPUT 1111 1111 11(00) 1000 0000 01(00) 1000 0000 00(00) 0111 1111 11(00) 0000 0000 01(00) 0000 0000 00(00) (+VREFIN) 511 512 (+VREFIN) 1 512 (-VREFIN) 1 512 (-VREFIN) 511 512 0V (-VREFIN) 512 512 = -VREFIN Table 5. Bipolar (Offset Binary) Code Table (-VREFIN to +VREFIN Output) Bipolar Configuration A -VREFIN to +VREFIN bipolar range is set up by con- necting ROFS to REFIN and RFB to VOUT, and operat- ing from dual (±5V) supplies (Figure 11). Table 5 shows the DAC-latch contents (input) vs. VOUT (out- put). In this range, 1LSB = VREFIN (2 -9). Four-Quadrant Multiplication The MAX503 can be used as a four-quadrant multiplier by connecting ROFS to REFIN and RFB to VOUT, and using (1) an offset binary digital code, (2) bipolar power supplies, and (3) a bipolar analog input at REFIN within the range VSS + 2V to VDD - 2V, as shown in Figure 12. In general, a 10-bit DAC’s output is D(VREFIN)(G), where “G” is the gain (1 or 2) and “D” is the binary rep- resentation of the digital input divided by 210 or 1,024. This formula is precise for unipolar operation. However, for bipolar, offset binary operation, the MSB is really a polarity bit. No resolution is lost because the number of steps is the same. The output voltage, however, has been shifted from a range of, for example, 0V to 4.096V (G = 2) to a range of -2.048V to +2.048V. Keep in mind that when using the DAC as a four-quad- rant multiplier, the scale is skewed. The negative full scale is -VREFIN, while the positive full scale is +VREFIN - 1LSB. * Write 10-bit data words with two sub-LSB 0s because the DAC input latch is 12 bits wide. * Write 10-bit data words with two sub-LSB 0s because the DAC input latch is 12 bits wide. * Write 10-bit data words with two sub-LSB 0s because the DAC input latch is 12 bits wide. |
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