Quad Digital Control Amplifier

4

MX019

1998 MX-COM, INC.

www.mxcom.com Tel: 800 638 5577 910 744 5050 Fax: 910 744 5054

Doc. # 20480077.006

4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA

All trademarks and service marks are held by their respective companies

2. Signal List

Pin No.

J/P

DW

TN

Name

Description

1

1

Serial Clock

This external clock pulse input is used to “clock in” the Control Data. See

Figure 3. This input has an internal 1M

 pullup resistor.

22

This input governs the loading and execution of the control data. During

serial data loading this input should be kept at a logical '0' to ensure that data

rippling past the latches has no effect. When all 8 bits have been loaded,

this input should be strobed '0 - 1 - 0' to latch the new data in. Data is

this pin should be left open circuit. This input has an internal 1M

 pullup

resistor.

34

LATCH

/

LOAD

data. During serial data loading this input should be kept at a logical '1' to

ensure that data rippling past the latches has no effect. When all 8 bits have

been loaded, this input should be strobed '1' - '0' - '1' to latch the new data in.

used this pin should be left open circuit. This input has an internal 1M



pulldown resistor.

4

5

Ch1 Input

Analog Inputs :

5

6

Ch2 Input

These individual amplifier inputs are self-biasing; AC input analog signals

must be capacitively coupled to these pins, as shown in Figure 2.

6

7

Ch3 Input

Note that amplifiers Ch1 to Ch4 are 'inverting amplifiers.'

7

8

Ch4 Input

812

Negative supply rail (GND).

913

decoupled to V

10

14

Ch4 Output

Controlled Analog Outputs :

11

17

Ch3 Output

These are individual "Gain Controlled" amplifier outputs. Ch1 to Ch3 range

from -3dB to +3dB in 0.43dB steps, Ch4 can be utilized as a volume control,

12

18

Ch2 Output

ranging from -14dB to +14dB in 2.0dB steps. In the “OFF” mode there is no

13

19

Ch1 Output

output from the selected amplifier.

14

20

Chip Address

A logic input to select one of two MX019 ICs in a system (see Table 1). This

input has an internal 1M

 pulldown resistor.

15

23

Control Data

Input

Operation of the 4 amplifier channels (Ch1 – Ch4) is controlled by the 8 bits

of data entered serially at this pin. The data is entered (bit 7 to bit 0) on the

rising edge of the external Serial Clock. The data format is described in

Table 1, Table 2 and Figure 3. This input has an internal 1M

 pullup resistor.

16

24

Positive supply rail. A single +5V power supply is required.