TLE82452-3SA datasheet(39/71 Pages) INFINEON

39 / 71 page

Data Sheet

Rev 1.0, 2015-03-27

TLE82452-3SA

Diagnosis Functions

Figure 19

Fault Conditions for High-Side Configuration

10.2

FAULTN pin

The FAULTN pin is an open drain output pin. The FAULTN pins of multiple devices can be connected to form a

“wired AND” circuit. The FAULTN pin can be used to generate an external interrupt to the microcontroller

whenever a fault is detected. The microcontroller must then interrogate the device by the SPI interface to

determine the type of the fault and the faulted channel number.

The FAULTN pin is pulled low when one of following unmasked faults is detected.

•overcurrent

•

overtemperature

•

open load in on state

•

switch bypass in on state

•

RESN pin is in low state

•

EN pin is in low state

•

internal reset is active due to VDDx undervoltage

•

CLK pin signal fault

•

VBAT pin overvoltage

•

LSUPx pin undervoltage

•

WD event

Certain faults can be masked by setting the appropriate mask bits in the configuration SPI register. A masked fault

has no effect on the FAULTN pin.

During power-up, the FAULTN pin is held low until the device is ready to operate. The FAULTN pin will transition

from low to high automatically after power-up.

OPEN LOAD

SHORT TO BATTERY

(switch bypass)

SHORT TO GROUND

(shorted load)

LOADx

HSLSx

VBAT

LOADx

HSLSx

VBAT

LOADx

HSLSx

VBAT

TLE82452-3SA Datasheet(PDF) 39 Page - Infineon Technologies AG

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