PIC16CE623-20SLASHSS datasheet(38/108 Pages) MICROCHIP

38 / 108 page

PIC16CE62X

DS40182A-page 38

Preliminary

7.3

Prescaler

An 8-bit counter is available as a prescaler for the

Timer0 module, or as a postscaler for the Watchdog

Timer, respectively (Figure 7-6). For simplicity, this

counter is being referred to as “prescaler” throughout

this data sheet. Note that there is only one prescaler

available which is mutually exclusive between the

Timer0 module and the Watchdog Timer. Thus, a

prescaler assignment for the Timer0 module means

that there is no prescaler for the Watchdog Timer, and

vice-versa.

The PSA and PS2:PS0 bits (OPTION<3:0>) determine

the prescaler assignment and prescale ratio.

When assigned to the Timer0 module, all instructions

writing to the TMR0 register (e.g., CLRF 1, MOVWF 1,

BSF 1,x

....etc.)

will

clear

the

prescaler.

When

assigned to WDT, a CLRWDT instruction will clear the

prescaler along with the Watchdog Timer. The

prescaler is not readable or writable.

FIGURE 7-6:

BLOCK DIAGRAM OF THE TIMER0/WDT PRESCALER

T0CKI

T0SE

CLKOUT (=Fosc/4)

SYNC

Cycles

TMR0 reg

8-bit Prescaler

8-to-1MUX

M U X

Watchdog

Timer

PSA

WDT

Time-out

PS0 - PS2

Note: T0SE, T0CS, PSA, PS0-PS2 are bits in the OPTION register.

PSA

WDT Enable bit

Data Bus

Set ﬂag bit T0IF

on Overﬂow

PSA

T0CS

62X.bk Page 38 Tuesday, March 10, 1998 3:40 PM

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