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PIC16LC62B-04/P Datasheet(PDF) 66 Page - Microchip Technology |
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PIC16LC62B-04/P Datasheet(HTML) 66 Page - Microchip Technology |
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66 / 120 page ![]() PIC16C62B/72A DS35008B-page 66 Preliminary © 1999 Microchip Technology Inc. FIGURE 10-10: WAKE-UP FROM SLEEP THROUGH INTERRUPT 10.14 Program Verification/Code Protection If the code protection bits have not been programmed, the on-chip program memory can be read out for verifi- cation purposes. 10.15 ID Locations Four memory locations (2000h - 2003h) are designated as ID locations where the user can store checksum or other code-identification numbers. These locations are not accessible during normal execution, but are read- able and writable during program/verify. It is recom- mended that only the 4 least significant bits of the ID location are used. For ROM devices, these values are submitted along with the ROM code. 10.16 In-Circuit Serial Programming™ PIC16CXXX microcontrollers can be serially pro- grammed while in the end application circuit. This is simply done with two lines for clock and data, and three more lines for power, ground and the programming volt- age. This allows customers to manufacture boards with unprogrammed devices, and then program the micro- controller just before shipping the product. This also allows the most recent firmware or a custom firmware to be programmed. For complete details of serial programming, please refer to the In-Circuit Serial Programming (ICSP™) Guide, DS30277. Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 OSC1 CLKOUT(4) INT pin INTF flag (INTCON<1>) GIE bit (INTCON<7>) INSTRUCTION FLOW PC Instruction fetched Instruction executed PC PC+1 PC+2 Inst(PC) = SLEEP Inst(PC - 1) Inst(PC + 1) SLEEP Processor in SLEEP Interrupt Latency (Note 2) Inst(PC + 2) Inst(PC + 1) Inst(0004h) Inst(0005h) Inst(0004h) Dummy cycle PC + 2 0004h 0005h Dummy cycle TOST(2) PC+2 Note 1: XT, HS or LP oscillator mode assumed. 2: TOST = 1024TOSC (drawing not to scale) This delay will not be there for RC osc mode. 3: GIE = ’1’ assumed. In this case after wake- up, the processor jumps to the interrupt routine. If GIE = ’0’, execution will continue in-line. 4: CLKOUT is not available in these osc modes, but shown here for timing reference. Note: Microchip does not recommend code pro- tecting windowed devices. |
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