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PIC17C44-08/P Datasheet(PDF) 127 Page - Microchip Technology |
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PIC17C44-08/P Datasheet(HTML) 127 Page - Microchip Technology |
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127 / 240 page ![]() © 1996 Microchip Technology Inc. DS30412C-page 127 PIC17C4X MOVLR Move Literal to high nibble in BSR Syntax: [ label ] MOVLR k Operands: 0 ≤ k ≤ 15 Operation: k → (BSR<7:4>) Status Affected: None Encoding: 1011 101x kkkk uuuu Description: The 4-bit literal 'k' is loaded into the most significant 4-bits of the Bank Select Register (BSR). Only the high 4-bits of the Bank Select Register are affected. The lower half of the BSR is unchanged. The assembler will encode the “u” fields as 0. Words: 1 Cycles: 1 Q Cycle Activity: Q1 Q2 Q3 Q4 Decode Read literal 'k:u' Execute Write literal 'k' to BSR<7:4> Example: MOVLR 5 Before Instruction BSR register = 0x22 After Instruction BSR register = 0x52 Note: This instruction is not available in the PIC17C42 device. MOVLW Move Literal to WREG Syntax: [ label ] MOVLW k Operands: 0 ≤ k ≤ 255 Operation: k → (WREG) Status Affected: None Encoding: 1011 0000 kkkk kkkk Description: The eight bit literal 'k' is loaded into WREG. Words: 1 Cycles: 1 Q Cycle Activity: Q1 Q2 Q3 Q4 Decode Read literal 'k' Execute Write to WREG Example: MOVLW 0x5A After Instruction WREG = 0x5A |
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