LM25115

SNVS418A – NOVEMBER 2005 – REVISED APRIL 2013

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Negative Current Limit

When inductor current flows from the regulator output through the low side MOSFET, the input to the current

sense comparator becomes negative. The intent of the negative current comparator is to protect the low-side

MOSFET from excessive currents. Negative current can lead to large negative voltage spikes on the output at

turn off which can damage circuitry powered by the output. The negative current comparator threshold is

sufficiently negative to allow inductor current to reverse at no load or light load conditions. It is not intended to

support discontinuous conduction mode with diode emulation by the low-side MOSFET. The negative current

comparator illustrated in Figure 15 monitors the CV signal and compares this signal to a fixed 1V threshold. This

Gate Drivers Outputs (HO & LO)

The LM25115 provides two gate driver outputs, the floating high-side gate driver HO and the synchronous

rectifier low-side driver LO. The low-side driver is powered directly by the VCC regulator. The high-side gate

driver is powered from a bootstrap capacitor connected between HB and HS. An external diode connected

between VCC and HB charges the bootstrap capacitor when the HS is low. When the high-side MOSFET is

external bootstrap diode. Both output drivers have adaptive dead-time control to avoid shoot through currents.

The adaptive dead-time control circuit monitors the state of each driver to ensure that the opposing MOSFET is

turned off before the other is turned on. The HB and VCC capacitors should be placed close to the pins of the

LM25115 to minimize voltage transients due to parasitic inductances and the high peak output currents of the

drivers. The recommended range of the HB capacitor is 0.047µF to 0.22µF.

Both drivers are controlled by the PWM logic signal from the PWM latch. When the phase signal is low, the

outputs are held in the reset state with the low-side MOSFET on and the high-side MOSFET off. When the phase

signal switches to the high state, the PWM latch reset signal is de-asserted. The high-side MOSFET remains off

until the PWM latch is set by the PWM comparator (CRMIX > CV as shown in Figure 13). When the PWM latch

is set, the LO driver turns off the low-side MOSFET and the HO driver turns on the high-side MOSFET. The high-

side pulse is terminated when the phase signal falls and the SYNC input comparator resets the PWM latch.

Free-Run Mode

The LM25115 can be operated as a conventional synchronous buck controller with a dc input supply instead of

the square wave phase signal. In the dc or free-run mode, the LM25115 PWM controller synchronizes to an

internal clock signal instead of the phase signal pulses. The clock frequency in the free-run mode is programmed

by the SYNC pin resistor and RAMP pin capacitor. Connecting a resistor between a dc bias supply and the

capacitor is charged until its voltage reaches the free-run mode peak threshold of 2.25V. The RAMP capacitor is

then discharged for 300ns before beginning a new PWM cycle. The 300ns reset time of the RAMP pin sets the

minimum off time of the PWM controller in the free-run mode. The internal clock frequency in the free-run mode

is set by the synchronization current, ramp capacitor, free-run peak threshold, and 300ns deadtime.

no longer functional in this operating mode, so the loop gain will vary as a function of Vin. The LM25115 controls

the buck power stage with leading edge pulse width modulaton to hold off the high-side driver until the necessary

volt*seconds is established for regulation. Other features described for the secondary side post regulator apply in

the free run mode operation. They include voltage mode control with current injection, positive and negative

current limit, programmable soft-start, adaptive delays for outputs, and thermal protection.

Thermal Protection

Internal thermal shutdown circuitry is provided to protect the integrated circuit in the event the maximum junction

temperature limit is exceeded. When activated, typically at 165 degrees Celsius, the controller is forced into a low

power standby state with the output drivers and the bias regulator disabled. The device will restart when the

junction temperature falls below the thermal shutdown hysteresis, which is typically 25 degrees. The thermal

protection feature is provided to prevent catastrophic failures from accidental device overheating.

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