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SM5838AS Datasheet(PDF) 11 Page - Nippon Precision Circuits Inc

Part # SM5838AS
Description  5120 X 8-bit Synchronous FIFO
PDF  14 Pages
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Manufacturer  NPC [Nippon Precision Circuits Inc]
Direct Link  http://www.npc.co.jp/en
Logo NPC - Nippon Precision Circuits Inc

SM5838AS Datasheet(HTML) 11 Page - Nippon Precision Circuits Inc

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SM5838AS
NIPPON PRECISION CIRCUITS—11
1/2 Data Reduction
Input data rate reduction by half can be realized by
taking WE and RE simultaneously HIGH only once
every two clock cycles.
Noninterlace-to-interlace conversions line extraction
can be realized by switching WE LOW/HIGH in line
units and RE LOW/HIGH in word units.
1/2 data reduction
1/2 line extraction (noninterlace-to-interlace conversion)
0123 45
01 2
nH
nH+1H
012345
012345
5119
nH-1H
nH
CLK
WE
RW
DIN
RE
OE
RR
DOUT
5119
5119
02
4
6
10
12
14
8
5118
0
2
4
6
10
12
14
8
5118
7 8 9
6
7 8 9
6
0123 45
01 2
01
2
0
12
909
909
nH-2H
nH
CLK
WE
RW
DOUT
RE
OE
RR
DIN
nH
nH+2H
1819
012345
012345
nH-1H
nH+1H
2 345
2345
01
0 1
909
909
909
909



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