SM5847AF datasheet(21/30 Pages) NPC

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SM5847AF

NIPPON PRECISION CIRCUITS—21

Group Delay

The data input to data output group delay is the delay

which occurs due to the digital ﬁlter calculations. It

is the time between the serial input data is com-

pletely read in (at rate fs) until the serial data is out-

put (at rate 8fs or 4fs, depending on the mode

selected).

tINPUT represents the LRCI clock rising edge after

the serial input data has been read in at rate fs.

tOUTPUT represents the WCKO clock falling edge at

the start of serial data output at rate 8fs or 4fs.

Table 13. Group delay

Mode

G r oup delay

Unit

CKSLN

SYNCN

tOUTPUT − tINPUT

L O W (256fs)

L O W

After reset, or sync mode

48.625/fs

sec

HIGH

Jitter-free mode

48.25/fs

− 49.0/fs

HIGH (192fs)

L O W

After reset, or sync mode

48.75/fs

HIGH

Jitter-free mode

48.375/fs

− 49.125/fs

Figure 6. Group delay timing (SYNCN = LOW)

1/fs

LRCI

WCKO

8fs

OMD=H

t OUTPUT

CKSLN=L

(256fs)

WCKO

4fs

OMD=L

WCKO

8fs

OMD=H

t OUTPUT

WCKO

4fs

OMD=L

t OUTPUT

serial data output (DOL,DOR)

CKSLN=H

(192fs)

t INPUT

1/fs

LRCI

48/fs

serial data input (DI/INF2N,

IW1N/DIL, IW2N/DIR)

serial data output (DOL,DOR)

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