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Z86L7208FSC Datasheet(PDF) 27 Page - Zilog, Inc. |
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Z86L7208FSC Datasheet(HTML) 27 Page - Zilog, Inc. |
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27 / 71 page ![]() Z86C72/C92/L72/L92 Zilog IR Microcontroller DS97LVO0900 P R E L I M I N A R Y 6-27 1 Comparator Inputs. In Analog Mode, Port 3 (P31 and P32) have a comparator front end. The comparator refer- ence is supplied to P33 and Pref1. In this mode, the P33 internal data latch and its corresponding IRQ1 is diverted to the SMR Sources (excluding P31, P32, and P33) as shown in Figure 38. In digital mode, P33 is used as D3 of the Port 3 input register which then generates IRQ1 as shown in Figure 15. When P31 is used as a counter timer input (demodulation mode), Timer input is always taken from the P31 digital in- put buffer (whether or not analog mode is enabled). Notes: Comparators are powered down by entering STOP mode. For P31-P33 to be used as a Stop-Mode Recovery source, these inputs must be placed into digital mode. Comparator Outputs. These may be programmed to be output on P34 and P37 through the PCON register (Figure 15). Figure 14. Port 3 Configuration P34 OUT P37 OUT P32 + - P33 (Pref2) 0 = P34, P37 Standard Output 1 = P34, P37 Comparator Output PCON D0 P31 + - Pref1 P37 PAD P34 PAD * T8 P34 OUT 0 Normal Control 1 8-bit Timer output active CTR0 D0 Counter/Timer Reset condition. * |
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