AS4LC8M8S0 datasheet(12/24 Pages) ALSC

12 / 24 page

ALLIANCE SEMICONDUCTOR

7/5/00

AS4LC4M16S0

AS4LC16M4S0

Mode register set command waveform

MRS can be issued only when both banks are idle.

Precharge waveforms

Precharge can be asserted after tRAS (min). The selected bank will enter the idle state after tRP.. The earliest assertion of the

precharge command without losing any burst data is show below.

(normal write; BL = 4)

(normal read; BL = 4)

Auto precharge waveforms

A10 controls the selection of auto precharge during the read or write command cycle.

(write with auto precharge; BL = 4)

(read with auto precharge; BL = 4)

* The row active command of the precharge bank can be issued after t

RP from this point. At burst read/write with auto precharge, CAS interrupt of the same

bank is illegal; other bank is described below.

CLK

CMD

PRE

MRS

ACT

tRP

tRSC(min)

CLK

CMD

PRE

CLK

CMD

DQ(CL2)

DQ(CL3)

Read data

PRE

CLK

CMD

Auto precharge starts*

CLK

CMD

DQ(CL2)

DQ(CL3)

Read data

AS4LC8M8S0 Datasheet(PDF) 12 Page - Alliance Semiconductor Corporation

AS4LC8M8S0 Datasheet(HTML) 12 Page - Alliance Semiconductor Corporation

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