AS4LC8M8S0 datasheet(17/24 Pages) ALSC

Part #	AS4LC8M8S0

Description	3.3V 4Mx16 and 8Mx8 CMOS synchronous DRAM

PDF	24 Pages

Scroll/Zoom	100%

Manufacturer	ALSC [Alliance Semiconductor Corporation]

Direct Link	https://www.alliancememory.com

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17 / 24 page

AS4LC8M8S0

AS4LC4M16S0

7/5/00

ALLIANCE SEMICONDUCTOR

write cycle

Precharge command

A Precharge command can be used to interrupt burst read/write operation during the read cycle. During RD, burst read is

terminated and o/p goes to High Z after CAS latency. The same bank can be activated after tRP. During write, burst write

operation is terminated immediately. Data written two cycles prior to the precharge command will be correctly stored. Set

DQM high one cycle before Precharge command and hold it high until Precharge command to mask and avoid writing invalid

data.

read cycle (CL = 2)

read cycle (CL = 3)

write cycle (BL = 8)

CLK

CMD

Burst stop

Write data

(CL = 2,3)

CLK

CMD

Read data

PRE

ACT

tRP

CLK

CMD

Read data

PRE

ACT

CLK

CMD

Write data

PRE

ACT

tRP

Masked

DQM

AS4LC8M8S0 Datasheet(PDF) 17 Page - Alliance Semiconductor Corporation