AH8501 datasheet(8/19 Pages) DIODES

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AH8501

Document number: DS37512 Rev. 1 - 2

8 of 19

www.diodes.com

February 2015

AH8501

Application Note

ENABLE Pin - Awake and Sleep Period Control

ENABLE pin controls the device’s “Awake” and “Sleep” periods and operating modes (Sleep, Auto-Run and External Drive modes).

When the ENABLE pin is pulled low (ENABLE = GND) continuously, the device enters sleep mode where the supply current is 8.93µA typical at

VDD = 1.8V (the output is 0.9V). The ENABLE pin is internally pulled low and therefore the default mode is the sleep mode if the ENABLE pin is

left floating.

When the ENABLE pin is pulled high (ENABLE = VDD or pulled high) the device enters auto-run mode with the conversion time TCONV of 16 clock

cycles (160µs typical) and therefore the sampling rate is 6.25kHz. The average supply current with the ENABLE pin pulled high continuously is

1.01mA at VDD = 1.8V.

In external drive mode, the sample rate can be controlled between 0 to 7.14kHz by clocking the ENABLE pin with an external PWM signal. The

minimum pulse width needed on the ENABLE pin to start sample/conversion is 20µs typical; we recommend using pulse width of 40µs minimum.

When the ENABLE pin is clocked, the conversion time (signal acquisition, conversion and output update) TCONV is 14 clock cycles (140µs

typical). When the ENABLE goes high, the sample trigger delay is 1 clock pulse (10µs) where supply current remains at 8.93µA typical at VDD =

1.8V. After the sample trigger delay, the next 12 clock pulse (120µs typical) is ‘Awake’ period where the typical supply current is 1.35mA at 1.8V

supply. The next pulse (10µs) is used to update the output stage and during this time the supply current drops back to 8.93µA typical at 1.8V

supply. Therefore, the average supply current while the device is at the maximum sampling rate of 7.14kHz is 1.16mA typical at 1.8V supply. At

a sampling rate of 20Hz, the supply current is 12µA typical at VDD = 1.8V achieving micropower operation.

For ENABLE pin clocking period of T, the average current is given by

(@ 1.8V)

(General equation)

Quiescent Output Voltage VNULL and Offset Voltage

The figure below shows the ideal transfer curve near zero magnetic field (B = 0Gauss). Zero Gauss is the transition point between

VOUTPUT = VDD*127/128 and VOUTPUT = VDD/2. When B is slightly larger than zero, the output is one-half the supply voltage typically.

Quiescent output voltage (VNULL) is defined as the typical output voltage when B = 0.5Gauss (slightly higher than 0G). Any difference of VNULL

from VDD/2 introduces offset (VOFSET).

Transfer Curve Near 0 Gauss

AH8501 Datasheet(PDF) 8 Page - Diodes Incorporated