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TSM1285BESA Datasheet(PDF) 3 Page - Silicon Laboratories |
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TSM1285BESA Datasheet(HTML) 3 Page - Silicon Laboratories |
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3 / 15 page  TSM1285 TSM1285 Rev. 1.0 Page 3 ELECTRICAL SPECIFICATIONS VDD = +2.7V to +3.6V; fSCLK = 4.8MHz, 50% duty cycle, 16 clocks/conversion cycle, 300ksps; 4.7 μF capacitor at REF; TA = -40ºC to +85ºC, unless otherwise noted. Typical values apply at TA = +25°C. PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS DC ACCURACY (See Note 1) Resolution 12 Bits Relative Accuracy INL See Note 2 ±1.0 LSB Differential Nonlinearity DNL No missing codes over temperature ±1.0 LSB Offset Error ZE ±6.0 LSB Gain Error GE See Note 3 ±6.0 LSB Gain-Error Temperature Coefficient TCGE ±1.6 ppm/°C DYNAMIC SPECIFICATIONS (fIN = 75kHz sine wave, 2.5VPP, fSAMPLE = 300ksps, fSCLK = 4.8MHz) Signal-to-Noise Plus Distortion Ratio SINAD 70 dB Total Harmonic Distortion THD Including the 5th harmonic -80 dB Spurious-Free Dynamic Range SFDR 80 dB Intermodulation Distortion IMD fA = 73kHz, fB = 77kHz 76 dB Full-Power Bandwidth FPBW -3dB point 3 MHz Full-Linear Bandwidth FLBW SINAD > 68dB 250 kHz CONVERSION RATE Conversion Time tCONV See Note 4 3.3 μs Track/Hold Acquisition Time tACQ 625 ns Aperture Delay tAD 10 ns Aperture Jitter tAJ < 50 ps Serial Clock Frequency tSCLK 0.5 4.8 MHz Duty Cycle 40 60 % ANALOG INPUT (AIN) Input Voltage Range VIN 0 2.5 V Input Capacitance CINA 10 pF INTERNAL REFERENCE REF Output Voltage VREF 2.48 2.50 2.52 V REF Short-Circuit Current TA = +25°C 15 mA REF Output Tempco TCVREF ±15 ppm/°C Load Regulation See Note 5; 0 to 0.75mA output load 0.1 2.0 mV/mA Capacitive Bypass at REF 4.7 10 μF DIGITAL INPUTS (SCLK, CS, SHDN) Input High Voltage VINH 2.0 V Input Low Voltage VINL 0.8 V Input Hysteresis VHYST 0.2 V Input Leakage IIN VINL = 0V or VINH = VDD ±1 μA Input Capacitance CIND 15 pF DIGITAL OUTPUT (DOUT) Output Voltage Low VOL ISINK = 5mA 0.4 V Output Voltage High VOH ISOURCE = 0.5mA VDD - 0.5 V Three-State Leakage Current IL VCS = +3V ±10 μA Three-State Output Capacitance COUT VCS = +3V 15 pF POWER SUPPLY Positive Supply Voltage VDD See Note 6 2.7 3.6 V Positive Supply Current IDD See Note 7; VDD = +3.6V 2.5 3.5 mA Shutdown Supply Current ISHDN SCLK = VDD, SHDN = GND 2 10 μA Power-Supply Rejection PSR VDD = +2.7V to 3.6V, midscale input ±0.5 mV |
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