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CAP1298 Datasheet(PDF) 46 Page - Microchip Technology |
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CAP1298 Datasheet(HTML) 46 Page - Microchip Technology |
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46 / 68 page ![]() CAP1298 DS00001571B-page 46 2013-2015 Microchip Technology Inc. 5.21 Standby Channel Register The Standby Channel register controls which (if any) capacitive touch sensor inputs are enabled in Standby (see Section 4.3.1.2, "Standby State Sensing Settings"). For all bits in this register: • ‘0’ (default) - The specified channel will not be monitored in Standby. • ‘1’ - The specified channel will be monitored in Standby. It will use the standby threshold setting, and the standby averaging and sensitivity settings. Bit 7 - CS8_STBY - Controls whether the CS8 channel is enabled in Standby. Bit 6 - CS7_STBY - Controls whether the CS7 channel is enabled in Standby. Bit 5 - CS6_STBY - Controls whether the CS6 channel is enabled in Standby. Bit 4 - CS5_STBY - Controls whether the CS5 channel is enabled in Standby. Bit 3 - CS4_STBY - Controls whether the CS4 channel is enabled in Standby. Bit 2 - CS3_STBY - Controls whether the CS3 channel is enabled in Standby. Bit 1 - CS2_STBY - Controls whether the CS2 channel is enabled in Standby. Bit 0 - CS1_STBY - Controls whether the CS1 channel is enabled in Standby. 5.22 Standby Configuration Register The Standby Configuration register controls averaging and sensing cycle time for sensor inputs enabled in Standby. This register allows the user to change averaging and sample times on a limited number of sensor inputs in Standby and still maintain normal functionality in the Active state. TABLE 5-3: CSX_BN_TH BIT DECODE CS_BN_TH[1:0] Percent Threshold Setting 10 00 25% 0 1 37.5% (default) 10 50% 1 1 62.5% TABLE 5-4: STANDBY CHANNEL REGISTER Addr R/W Register B7 B6 B5B4 B3B2 B1B0 Default 40h R/W Standby Channel CS8_ STBY CS7_ STBY CS6_ STBY CS5_ STBY CS4_ STBY CS3_ STBY CS2_ STBY CS1_ STBY 00h TABLE 5-5: STANDBY CONFIGURATION REGISTER Addr R/W Register B7 B6 B5 B4 B3 B2 B1 B0 Default 41h R/W Standby Configuration AVG_ SUM STBY_AVG[2:0] STBY_SAMP_ TIME[1:0] STBY_CY_TIME [1:0] 39h |
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