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STM32F303VE Datasheet(PDF) 130 Page - STMicroelectronics

Part # STM32F303VE
Description  Reset and supply management
PDF  184 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32F303VE Datasheet(HTML) 130 Page - STMicroelectronics

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Electrical characteristics
STM32F303xD STM32F303xE
130/184
DocID026415 Rev 4
Input/output AC characteristics
The definition and values of input/output AC characteristics are given in Figure 40 and
Table 67, respectively.
Unless otherwise specified, the parameters given are derived from tests performed under
ambient temperature and VDD supply voltage conditions summarized in Table 19.
Table 67. I/O AC characteristics(1)
OSPEEDRy [1:0]
value(1)
Symbol
Parameter
Conditions
Min
Max
Unit
x0
fmax(IO)out Maximum frequency(2)
CL = 50 pF, VDD = 2 V to 3.6 V
-
2(3)
MHz
tf(IO)out
Output high to low level
fall time
CL = 50 pF, VDD = 2 V to 3.6 V
-
125(3)
ns
tr(IO)out
Output low to high level
rise time
-
125(3)
01
fmax(IO)out Maximum frequency(2)
CL = 50 pF, VDD = 2 V to 3.6 V
-
10(3)
MHz
tf(IO)out
Output high to low level
fall time
CL = 50 pF, VDD = 2 V to 3.6 V
-25(3)
ns
tr(IO)out
Output low to high level
rise time
-25(3)
11
fmax(IO)out Maximum frequency(2)
CL = 30 pF, VDD = 2.7 V to 3.6 V
-
50(3)
MHz
CL = 50 pF, VDD = 2.7 V to 3.6 V
-
30(3)
CL = 50 pF, VDD = 2 V to 2.7 V
-
20(3)
tf(IO)out
Output high to low level
fall time
CL = 30 pF, VDD = 2.7 V to 3.6 V
-
5(3)
ns
CL = 50 pF, VDD = 2.7 V to 3.6 V
-
8(3)
CL = 50 pF, VDD = 2 V to 2.7 V
-
12(3)
tr(IO)out
Output low to high level
rise time
CL = 30 pF, VDD = 2.7 V to 3.6 V
-
5(3)
CL = 50 pF, VDD = 2.7 V to 3.6 V
-
8(3)
CL = 50 pF, VDD = 2 V to 2.7 V
-
12(3)
FM+
configuration(4)
fmax(IO)out Maximum frequency(2)
CL = 50 pF, VDD = 2 to 3.6 V
-2(4)
MHz
tf(IO)out
Output high to low level
fall time
-12(4)
ns
tr(IO)out
Output low to high level
rise time
-34(4)
-tEXTIpw
Pulse width of external
signals detected by the
EXTI controller
-10(3)
-ns
1. The I/O speed is configured using the OSPEEDRx[1:0] bits. Refer to the RM0316 reference manual for a description of
GPIO Port configuration register.
2. The maximum frequency is defined in Figure 40.
3. Guaranteed by design, not tested in production.
4. The I/O speed configuration is bypassed in FM+ I/O mode. Refer to the reference manual RM0316 for a description of FM+
I/O mode configuration.



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